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Comparison of TDC Circuit Design Method to Constant Delay Time

  • Choi, Jin-Ho (Department of Embedded IT, Pusan University of Foreign Studies)
  • Received : 2010.06.29
  • Accepted : 2010.07.26
  • Published : 2010.08.31

Abstract

This paper describes the design method of Time-to-Digital Converter(TDC) to obtain the constant delay time and good reliability. The reliability property is described with delay elements. In TDC the time signal is converted to digital value which is based on delay elements for the time interpolation. To obtain the constant delay time, the first and the last delay elements have different structure compared to the middle delay elements. In the first and the last delay elements, the driving ability could be controlled for the different delay time. The delay element can be designed by analog and digital devices. The delay time of the element using analog devices is not sensitive to process parameters than that of the element using digital devices. And the TDC circuit by the elements using analog devices shows better reliability than that by the elements using digital devices also.

Keywords

References

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