대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
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천이 수정을 통한 고 성능 테스트 데이터 압축 기법

A New High Performance Test-data Compression Scheme Using Transition Modification

  • 박재석 (연세대학교 전기전자공학과) ;
  • 양명훈 (연세대학교 전기전자공학과) ;
  • 김용준 (연세대학교 전기전자공학과) ;
  • 박영규 (연세대학교 전기전자공학과) ;
  • 윤현준 (연세대학교 전기전자공학과) ;
  • 강성호 (연세대학교 전기전자공학과)
  • Park, Jae-Seok (Department of Electrical Electronic Engineering, Yonsei University) ;
  • Yang, Myung-Hoon (Department of Electrical Electronic Engineering, Yonsei University) ;
  • Kim, Yong-Joon (Department of Electrical Electronic Engineering, Yonsei University) ;
  • Park, Young-Kyu (Department of Electrical Electronic Engineering, Yonsei University) ;
  • Yoon, Hyun-Jun (Department of Electrical Electronic Engineering, Yonsei University) ;
  • Kang, Sung-Ho (Department of Electrical Electronic Engineering, Yonsei University)
  • 발행 : 2008.09.25
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⟨ 이전 논문 다음 논문 ⟩

초록

본 논문은 높은 압축 성능을 가진 테스트 데이터 압축 기법을 제안한다. 제안하는 기법은 돈 케어 리맵핑을 이용한 천이 추가 단계와 천이 이전 단계로 구성된다. 실험 결과는 새로운 기법이 가장 높은 성능의 기법들 중 하나인 RL-huffman보다 높은 압축률을 제공하고 더 작은 하드웨어 면적을 필요로 함을 보여준다. 따라서 이 기법은 테스트 데이터 압축을 위한 실제적인 해법으로 널리 쓰일 수 있다.

This paper proposes a new test data compression scheme which has good performance. The proposed scheme is composed of adding transition stage and shifting transition stage using don't care remapping technique. The experimental results show that the new scheme provides higher compression ratio than RL-huffman encoding which is the one of the highest performance schemes, and requires smaller hardware overhead. Therefore it can be widely used as a practical solution for test data compression.

키워드

참고문헌

  1. A. Chandra, and K. Chakrabarty, "System-on- a-chip test data compressionand decompression architectures based on Golomb codes," IEEE Trans. Computer-Aided Design, vol. 20, pp. 113-120, Mar. 2001
  2. A. Chandra, and K. Chakrabarty, "Frequency- Directed Run-Length (FDR) codes with application to system-on-a-chip test data compression," in Proc. IEEE VLSI Test Symp., Apr. 2001, pp. 114-121
  3. A. El. Maleh and R. Al-Abaji, "Extended frequency-directed run-length codes with improved application to system-on-a-chip test data compression," in Proc. Int. Conf. Electronic Circuits Systems (ICECS''02), 2002, pp. 449-452
  4. A. Jas, J. Ghosh-Dastidar, and N. A. Touba, "Scan vector compression/decompression using statistical coding," in Proc. IEEE VLSI Test Symp., Apr. 1999, pp. 114-121
  5. A. Jas, J. Gosh-Dastidar, M. Ng, and N. Touba, "An efficient test vector compression scheme using selective Huffman coding," IEEE Trans. Computer-Aided Design Integr. Circuits Syst., vol. 22, no. 6, pp.797-806, Jun. 2003 https://doi.org/10.1109/TCAD.2003.811452
  6. X. Kavousianos, E. Kalligeros., and D. Nikolos, "Optimal selective huffman coding for test-data compression," IEEE Transactions on Computers, Volume 56, Issue 8, pp. 1146-1152 Aug. 2007 https://doi.org/10.1109/TC.2007.1057
  7. P. Gonciari, B. Al-Hashimi, and N. Nicolici, "Improving compression ratio, area overhead, and test application time for system-on-a-chip test data compression/decompression," design, Automation and Test in Europe (DATE'02), pp. 604-611, Mar. 2002
  8. M. Tehranipour, M. Nourani, and K. Chakrabarty, "Nine-Coded Compression Technique for Testing Embedded Cores in SoCs," IEEE Trans. VLSI Systems, vol. 13, pp. 719-731, June 2005 https://doi.org/10.1109/TVLSI.2005.844311
  9. M. Nourani, and M. Tehranipour, "RL-Huffman encoding for test compression and power reduction in scan application," ACM Trans. Design Automat. Electron. Syst., vol. 10, no. 1, pp. 91-115, Jan. 2005 https://doi.org/10.1145/1044111.1044117
  10. TetraMax Reference Manual. Release 2004. 12, Synopsys Inc., Mountain View, CA, 2001
  11. A. Chandra, and K. Chakrabarty, "Low-Power Scan Testing and Test Data Compression for System-on-a-Chip," IEEE Trans. On Computer-Aided Design (TCAD), vol. 21, no. 5, pp. 597-604, May. 2002 https://doi.org/10.1109/43.998630