무선랜용 I/Q 채널 12bit 120MHz CMOS D/A 변환기 설계

I/Q channel 12-Bit 120MHz CMOS D/A Converter for WLAN

  • 하성민 (인하대학교 전자공학과) ;
  • 남태규 (인하대학교 전자공학과) ;
  • 서성욱 (인하대학교 전자공학과) ;
  • 신선화 (인하대학교 전자공학과) ;
  • 주찬양 (인하대학교 전자공학과) ;
  • 윤광섭 (인하대학교 전자공학과)
  • Ha, Sung-Min (Dept. of Electronic Engineering, Inha University) ;
  • Nam, Tae-Kyu (Dept. of Electronic Engineering, Inha University) ;
  • Seo, Sung-Uk (Dept. of Electronic Engineering, Inha University) ;
  • Shin, Sun-Hwa (Dept. of Electronic Engineering, Inha University) ;
  • Joo, Chan-Yang (Dept. of Electronic Engineering, Inha University) ;
  • Yoon, Kwang-S. (Dept. of Electronic Engineering, Inha University)
  • 발행 : 2006.11.25

초록

본 논문에서는 무선통신용 송수신기에 집적화할 수 있도록 $0.35{\mu}m$ CMOS n-well 1-poly 4-metal 공정을 이용하여 3.3V의 전원 전압으로 동작하는 I/Q 채널 12비트 120MHz 전류구동 D/A 변환기를 설계하였다. 설계된 12비트 D/A 변환기는 4비트 온도계 디코더를 3단 구성하여 글리치 에너지와 선형오차 특성을 최소화하였다. 측정된 선형오차인 INL/DNL은 각각 ${\pm}1.5LSB$, ${\pm}1.3LSB$이며, 글리치 에너지는 31pV.s 로 측정되었고, 전력소모는 105mW이다. 샘플링 및 입력주파수가 각각 120MHz, 1MHz일 때, 싱글 톤 테스트에서 유효비트수는 10.5비트로 측정되었다. 듀얼 톤 테스트에서 1MHz/1.1MHz의 기저대역신호는 0.9MHz/1.2MHz의 영상신호 차이가 -63dB 나타나는 것으로 측정되었다.

This paper describes the design of I/Q channel 12bit Digital-to-Analog Converter(DAC) which shows the conversion rate of 120MHz and the power supply of 3.3V with 0.35um CMOS n-well 1-poly 4-metal process for advanced wireless transceiver. The proposed DAC utilizes 4-bit thermometer decoder with 3 stages for minimum glitch energy and linearity error. Also, using a optimized 4bit thermometer decoder for the decrement of the chip area. Integral nonlinearity(INL) of ${\pm}1.6LSB$ and differential nonlinearity(DNL) of ${\pm}1.3LSB$ have been measured. In single tone test, the ENOB of the proposed 12bit DAC is 10.5bit and SFDR of 73dB(@ Fs=120MHz, Fin=1MHz) is measured, respectively. Dual-tone test SFDR is 61 dB (@ Fs=100MHz, Fin=1.5MHz, 2MHz). Glitch energy of 31 pV.s is measured. The converter consumes a total of 105mW from 3.3-V power supply.

키워드

참고문헌

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