IEEE 801.11a 무선랜을 위한 Active-RC 아날로그 채널 선택 필터

An active-RC analog channel selection filter for IEEE 802.11a wireless LAN

  • 황진홍 (한양대학교 전자통신컴퓨터공학부) ;
  • 유창식 (한양대학교 전자통신컴퓨터공학부)
  • Hwang, Jin-Hong (Department of Electronics and Computer Engineering, Hanyang University) ;
  • Yoo, Chang-Sik (Department of Electronics and Computer Engineering, Hanyang University)
  • 발행 : 2006.11.25

초록

직접 변환 방식의 IEEE 802.11a 무선랜 수신기에 사용되는 아날로그 채널 선택 필터에 대하여 기술한다. 채널 선택필터는 10MHz의 차단주파수를 갖는 5차의 체비셰프 필터이며 active-RC 구조로 설계되었다. 2단의 연산증폭기를 사용하였는데, 전력 소모를 최소화하기 위하여 전류재사용 feedforward 주파수 보상 방법을 사용하였다. 필터는 $0.l8{\mu}m$ CMOS 공정을 사용하여 제작하였으며 1.8V의 전원 전압에서 20mW의 전력 소모를 갖고 있으며 19dBV의 out-of-band iIP3를 갖는다.

Analog channel selection filter is described which is designed for a direct-conversion receiver of a IEEE 802.11a wireless LAN. The channel selection filter is an active-RC fifth-order Chebyshev filter with 10MHz cut-off frequency. Two-stage operational amplifier of the filter employs a current re-using feedforward frequency compensation scheme to minimize the power consumption. The filter has been implemented in a 0.18mm CMOS technology and the experimental results show 20mW power consumption with 1.8V supply voltage and 19dB out-of-band iIP3.

키워드

참고문헌

  1. B. Razavi, RF Microelectronics, Prentice Hall, 1998
  2. J.-H. Hwang, M.-Y. Lee, C.-Y. Jeong, and C. Yoo, 'Active-RC channel selection filter tunable from 6kHz to 18MHz for software defined radio,' Proc. IEEE Int Symp. Circuits and Systems, pp. 4803-4806, 2005 https://doi.org/10.1109/ISCAS.2005.1465707
  3. R. Schaumann and V. Valkenburg, Design of Analog Filters, Oxford Press, 2001
  4. S. K. Reynolds, B. A. Floyd, T. Beukema, T. Zwick, U. Pfeiffer, and H. Ainspan, 'A direct-conversion receiver IC for WCDMA mobile systems,' IEEE J. Solid-State Circuits, Vol. 38, No. 9, pp. 1555-1560, Sep. 2003 https://doi.org/10.1109/JSSC.2003.815914
  5. A. Parssinen, J. Jussila, J. Ryynanen, L. Sumanen, K. Halonen, 'A 2-GHz wideband direct conversion receiver for WCDMA applications,' IEEE J. Solid-State Circuits, Vol. 34, No. 12, pp. 1893-1903, Dec. 1999 https://doi.org/10.1109/4.808914
  6. R. Magoon, A. Molnar, J. Zachan, G. Hatcher, and W. Rhee, 'A single chip quad band (850/900/1800/1900MHz) direct conversion GSM/GPRS RF transceiver with integrated VCOs and fractional-N synthesizer,' IEEE J. Solid-State Circuits, Vol. 37, No. 12, pp. 1710-1720, Dec. 2002 https://doi.org/10.1109/JSSC.2002.804356
  7. A. Durham, J. Hughes, W. Redman-White, 'Circuit architectures for high linearity monolithic continuous-time filtering', IEEE Trans. Circuits and Systems II, Vol. 39, No. 9, pp. 651-657, Sep. 1992 https://doi.org/10.1109/82.193320
  8. D. A. Johns, and K. Martin, Analog Integrated Circuit Design, John Wiley and Sons, 1997
  9. B. Thandri and J. Silva-Martinez, 'A robust feedforward compensation scheme for multistage operational transconductance amplifiers with no Miller capacitors,' IEEE J. Solid-State Circuits, pp. 237-243, Feb. 2003 https://doi.org/10.1109/JSSC.2002.807410
  10. J.-H. Hwang and C. Yoo, 'A low-power wide-bandwidth fully differential operational amplifier with current re-using feedforward frequency compensation,' Proc. IEEE AP-ASIC, pp. 32-35, Aug. 2004 https://doi.org/10.1109/APASIC.2004.1349396