Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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An Efficient Test Data Compression/Decompression for Low Power Testing

저전력 테스트를 고려한 효율적인 테스트 데이터 압축 방법

  • Chun Sunghoon (Department of Electrical and Electronic Engineering, Graduate School, Yonsei University) ;
  • Im Jung-Bin (Department of Electrical and Electronic Engineering, Graduate School, Yonsei University) ;
  • Kim Gun-Bae (Department of Electrical and Electronic Engineering, Graduate School, Yonsei University) ;
  • An Jin-Ho (Department of Electrical and Electronic Engineering, Graduate School, Yonsei University) ;
  • Kang Sungho (Department of Electrical and Electronic Engineering, Graduate School, Yonsei University)
  • 전성훈 (연세대학교 전기전자공학과) ;
  • 임정빈 (연세대학교 전기전자공학과) ;
  • 김근배 (연세대학교 전기전자공학과) ;
  • 안진호 (연세대학교 전기전자공학과) ;
  • 강성호 (연세대학교 전기전자공학과)
  • Published : 2005.02.01
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Abstract

Test data volume and power consumption for scan vectors are two major problems in system-on-a-chip testing. Therefore, this paper proposes a new test data compression/decompression method for low power testing. The method is based on analyzing the factors that influence test parameters: compression ratio, power reduction and hardware overhead. To improve the compression ratio and the power reduction ratio, the proposed method is based on Modified Statistical Coding (MSC), Input Reduction (IR) scheme and the algorithms of reordering scan flip-flops and reordering test pattern sequence in a preprocessing step. Unlike previous approaches using the CSR architecture, the proposed method is to compress original test data, not $T_{diff}$, and decompress the compressed test data without the CSR architecture. Therefore, the proposed method leads to better compression ratio with lower hardware overhead and lower power consumption than previous works. An experimental comparison on ISCAS '89 benchmark circuits validates the proposed method.

스캔 테스트를 위한 테스트 데이터의 양과 파워 소모는 SoC 테스트에서의 최근의 직면한 가장 큰 문제들이다. 따라서 본 논문에서는 저전력 테스트를 고려한 새로운 테스트 데이터 압축 방법을 제안한다. 제안하는 압축 방법은 테스트 데이터 압축을 위해 압축율, 전력 소모 감소율과 하드웨어 오버헤드를 고려하여 최대 효율을 가지도록 하는데 기초하고 있다. 압축율과 전력 감소율을 높이기 위해서 본 논문에서는 IR (Input Reduction) 기법과 MSCIR (Modified Statistical Code using Input Reduction) 압축 코드을 사용하며, 뿐만아니라 이를 위한 사전 작업인 새로운 스캔 플립플롭 순서 재조합 기법 및 테스트 패턴 순서 재조합 방법을 제안한다. 기존의 연구와는 달리 CSR 구조를 사용하지 않고 원래의 테스트 데이터 $T_D$를 사용하여 압축하는 방법을 사용한다. 이렇게 함으로써 제안하는 압축 방법은 기존의 연구에 비해 훨씬 높은 압축율을 가지며 낮은 하드웨어 오버헤드의 디컴프레션 구조와 적은 전력 소모를 가진다. ISCAS '89 벤치 회로에 대찬 기존의 연구와의 비교로서 그 결과를 알 수 있다.

Keywords

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