대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

무선통신소자제작을 위한 45GHz $f_{T}$ 및 50GHZz $f_{max}$ SiGe BiCMOS 개발

A 45GHz $f_{T}\;and\;50GHz\;f_{max}$ SiGe BiCMOS Technology Development for Wireless Communication ICs

  • 황석희 (삼성전자 반도체총괄 SYS.LSI사업부 기술개발실) ;
  • 조대형 (삼성전자 반도체총괄 SYS.LSI사업부 기술개발실) ;
  • 박강욱 (삼성전자 반도체총괄 SYS.LSI사업부 기술개발실) ;
  • 이상돈 (삼성전자 반도체총괄 SYS.LSI사업부 기술개발실) ;
  • 김남주 (동부아남반도체(주))
  • Hwang Seok-Hee (Technology Development, SYS.LSI Division, Semiconductor Business, Samsung Electronics) ;
  • Cho Dae-Hyung (Technology Development, SYS.LSI Division, Semiconductor Business, Samsung Electronics) ;
  • Park Kang-Wook (Technology Development, SYS.LSI Division, Semiconductor Business, Samsung Electronics) ;
  • Yi Sang-Don (Technology Development, SYS.LSI Division, Semiconductor Business, Samsung Electronics) ;
  • Kim Nam-Ju (DongbuAnam Semiconductor)
  • 발행 : 2005.09.01
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⟨ 이전 논문 다음 논문 ⟩

초록

최근 Mobile용 RF ICs 적용을 위한 RF CMOS 기술과 함께 핵심 기술로 SiGe Heterojunction Bipolar Transistor (HBT) 소자 개발의 중요성이 증대되고 있다. 본 논문은 현재 5GHz 동작 수준의 RF제품에서 주로 사용되는 기술인 $0.35\{mu}m$ 설계 Rule을 적용하여 $f_{max}$ 50GHz에서 동작하는 SiGe BiCMOS 기술 개발에 대한 내용을 논의한다. 본 SiGe HBT에 사용하는 에피막 성장 기술은 Trapezoidal Ge base profile 및 non-selective 방식이고, 에미터 RTA 조건 및 SiGe HBT base에 대한 Vertical Profile 최적화를 수행하였다. hFE 100, $f_{T}\;45GHz,\;NF_{min}\;0.8dB$ 수준으로 우수한 특성 및 기술 경쟁력을 갖는 SiGe BiCMOS 공정 개발 및 양산 기술을 확보하였다. 또한, 기존의 0.35um설계 Rule공정 target떼 부합되는 CMOS소자를 포함시켰으며, RF용 Passive소자로 높은 Q값을 갖는 MIM capacitor(1pF, Q>80), Inductor(2nH $Q\~$l2.5)를 제공하였다

A $0.35\mu$m SiGe BiCMOS fabrication process has been timely developed, which is aiming at wireless RF ICs development and fast growing SiGe RF market. With non-selective SiGe epilayer, SiGe HBTs in this process used trapezoidal Ge base profile for the enhanced AC performance via Ge induced bandgap niuoin. The characteristics of hFE 100, $f_{T}\;45GHz,\;F_{max}\;50GHz,\;NF_{min}\;0.8dB$ have been obtained by optimizing not only SiGe base profile but also RTA condition after emitter polysilicon deposition, which enables the SiGe technology competition against the worldwide cutting edge SiGe BiCMOS technology. In addition, the process incorporates the CMOS logic, which is fully compatible with $0.35\mu$m pure logic technology. High Q passive elements are also provided for high precision analog circuit designs, and their quality factors of W(1pF) and inductor(2nH) are 80, 12.5, respectively.

키워드

참고문헌

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