A novel wafer-level-packaging scheme using solder

쏠더를 이용한 웨이퍼 레벨 실장 기술

  • 이은성 (서울대학교 전기 컴퓨터 공학부) ;
  • 김운배 (삼성종합기술원 MEMS Lab.) ;
  • 송인상 (삼성종합기술원 MEMS Lab.) ;
  • 문창렬 (삼성종합기술원 MEMS Lab.) ;
  • 김현철 (서울대학교 전기 컴퓨터 공학부) ;
  • 전국진 (서울대학교 전기 컴퓨터 공학부)
  • Published : 2004.09.01

Abstract

A new wafer level packaging scheme is presented as an alternative to MEMS package. The proof-of-concept structure is fabricated and evaluated to confirm the feasibility of the idea for MEMS wafer level packaging. The scheme of this work is developed using an electroplated tin (Sn) solder. The critical difference over conventional ones is that wafers are laterally bonded by solder reflow after LEGO-like assembly. This lateral bonding scheme has merits basically in morphological insensitivity and its better bonding strength over conventional ones and also enables not only the hermetic sealing but also its electrical interconnection solving an open-circuit problem by notching through via-hole. The bonding strength of the lateral bonding is over 30 Mpa as evaluated under shear and the hermeticity of the encapsulation is 2.0$\times10^{-9}$mbar.$l$/sec as examined by pressurized Helium leak rate. Results show that the new scheme is feasible and could be an alternative method for high yield wafer level packaging.

Keywords