Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of an IFFT∪FFT processor with manipulated coefficients based on the statistics distribution for OFDM

확률분포 특성을 이용한 OFDM용 IFFT∪FFT프로세서 설계

  • Choi, Won-Chul (Dept. of Computer and Communication Engineering, Chungbuk National University) ;
  • Lee, Hyun (Electronics and Telecommunications Research Institute) ;
  • Cho, Kyoung-Rok (Dept. of Computer and Communication Engineering, Chungbuk National University)
  • 최원철 (충북대학교 정보통신공학과) ;
  • 이현 (한국전자통신연구소) ;
  • 조경록 (충북대학교 정보통신공학과)
  • Published : 2003.12.01
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Abstract

In this paper, we propose an IFFT/FFT design method to minimize quantization error in IEEE 802.11a WLAN. In the proposed algorithm, the twiddle coefficient of IFFT/FFT processor is manipulated by the statistics distribution of the input data at each stage. We applies this algorithm to radix-2/$^2$ SDF architecture. Both IFFT and FFT processor shares the circuit blocks cause to the symmetric architecture. The maximum quantization error with the 10 bits length of the input and output data is 0.0021 in IFFT and FFT that has a self-loop structure with the proposed method. As a result, the proposed architecture saves 3bits for the data to keep the same resolution compared with the conventional method.

본 논문에서는 통계적 분석 방법으로 IEEE 802.11a WLAN의 OFDM 모뎀용 IFFT 및 FFT의 양자화 에러를 최소화하는 설계방법을 제안한다. 제안된 방법은 IFFT 및 FFT의 회전계수(twiddle coefficient)에 통계적으로 계산된 계수를 적용하여 회전계수를 수정하는 새로운 알고리즘을 사용한다. 본 논문에서는 알고리즘을 radix-2² SDF(single-path delay feedback) 구조에 적용하여 설계하였고 IFFT와 FFT의 대칭적 성질을 이용하여 회로블록을 공유하도록 하였다. 회로 레벨에서 설계된 입출력 10비트인 송신단의 IFFT와 수신단의 FFT가 자기루프 구조 가졌을 때 최대 양자화 오차는 0.0021이다. 기존의 선형확장 회전계수의 최대 양자화 오차가 0.0087로 측정되었기 때문에 제안된 프로세서가 3비트 효율이 좋다.

Keywords

References

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