The Peripheral Circuit Design of 30nm Multi-level Non-volatile Memory for characteristics and operating evaluation

30nm급 Multi-level Non-volatile Memory의 특성 및 동작 평가를 위한 주변 회로 설계

  • Yoon, Han-Sub (Advanced Semiconductor Research Center, Division of Electronics & Computer Engineering, Hanyang University) ;
  • Park, Seong-Woo (Advanced Semiconductor Research Center, Division of Electronics & Computer Engineering, Hanyang University) ;
  • Li, Xue-Zhu (Advanced Semiconductor Research Center, Division of Electronics & Computer Engineering, Hanyang University) ;
  • Kwack, Kae-Dal (Advanced Semiconductor Research Center, Division of Electronics & Computer Engineering, Hanyang University)
  • 윤한섭 (한양대학교 전자통신컴퓨터공학부) ;
  • 박성우 (한양대학교 전자통신컴퓨터공학부) ;
  • 이학수 (한양대학교 전자통신컴퓨터공학부) ;
  • 곽계달 (한양대학교 전자통신컴퓨터공학부)
  • Published : 2008.06.18