• Title/Summary/Keyword: wafer bonding

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A Fundamental Study of the Bonded SOI Water Manufacturing (Bonded SOI 웨이퍼 제조를 위한 기초연구)

  • 문도민;강성건;정해도
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1997.04a
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    • pp.921-926
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    • 1997
  • SOI(Silicon On lnsulator) technology is many advantages in the gabrication of MOS(Metal-Oxide Semiconductor) and CMOS(Complementary MOS) structures. These include high speed, lower dynamic power consumption,greater packing density, increased radiation tolearence et al. In smiple form of bonded SOL wafer manufacturing, creation of a bonded SOI structure involves oxidizing at least one of the mirror polished silicon surfaces, cleaning the oxidized surface and the surface of the layer to which it will be bonded,bringing the two cleanded surfaces together in close physical proximity, allowing the subsequent room temperature bonding to proceed to completion, and than following this room temperature joining with some form of heat treatment step,and device wafer is thinned to the target thickness. This paper has been performed to investigate the possibility of the bonded SOI wafer manufacturing Especially, we focused on the bonding quality and thinning method. Finally,we achieved the bonded SOI wafer that Si layer thickness is below 3 .mu. m and average roughness is below 5.angs.

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Temperature Uniformity Control of Wafer During Vacuum Soldering Process (진공 솔더링 공정 중 웨이퍼 온도균일화 제어)

  • Kang, Min Sig;Jee, Won Ho;Yoon, Wo Hyun
    • Journal of the Semiconductor & Display Technology
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    • v.11 no.2
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    • pp.63-69
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    • 2012
  • As decreasing size of chips, the need of wafer level packaging is increased in semi-conductor and display industries. Temperature uniformity is a crucial factor in vacuum soldering process to guarantee quality of bonding between chips and wafer. In this paper, a stepwise iterative algorithm has been suggested to obtain output profile of each heat source. Since this algorithm is based on open-loop stepwise iterative experimental technique, it is easier to implement and cost effective than real time feedback controls. Along with some experiments, it was shown that the suggested algorithm can remarkably improve temperature uniformity of wafer during whole heating process compared with the ordinary manual trial-and error method.

A Study on Wafer-Level 3D Integration Including Wafer Bonding using Low-k Polymeric Adhesive (저유전체 고분자 접착 물질을 이용한 웨이퍼 본딩을 포함하는 웨이퍼 레벨 3차원 집적회로 구현에 관한 연구)

  • Kwon, Yongchai;Seok, Jongwon;Lu, Jian-Qiang;Cale, Timothy;Gutmann, Ronald
    • Korean Chemical Engineering Research
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    • v.45 no.5
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    • pp.466-472
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    • 2007
  • A technology platform for wafer-level three-dimensional integration circuits (3D-ICs) is presented, and that uses wafer bonding with low-k polymeric adhesives and Cu damascene inter-wafer interconnects. In this work, one of such technical platforms is explained and characterized using a test vehicle of inter-wafer 3D via-chain structures. Electrical and mechanical characterizations of the structure are performed using continuously connected 3D via-chains. Evaluation results of the wafer bonding, which is a necessary process for stacking the wafers and uses low-k dielectrics as polymeric adhesive, are also presented through the wafer bonding between a glass wafer and a silicon wafer. After wafer bonding, three evaluations are conducted; (1) the fraction of bonded area is measured through the optical inspection, (2) the qualitative bond strength test to inspect the separation of the bonded wafers is taken by a razor blade, and (3) the quantitative bond strength is measured by a four point bending. To date, benzocyclobutene (BCB), $Flare^{TM}$, methylsilsesquioxane (MSSQ) and parylene-N were considered as bonding adhesives. Of the candidates, BCB and $Flare^{TM}$ were determined as adhesives after screening tests. By comparing BCB and $Flare^{TM}$, it was deduced that BCB is better as a baseline adhesive. It was because although wafer pairs bonded using $Flare^{TM}$ has a higher bond strength than those using BCB, wafer pairs bonded using BCB is still higher than that at the interface between Cu and porous low-k interlevel dielectrics (ILD), indicating almost 100% of bonded area routinely.

Wafer-level Vacuum Packaging of a MEMS Resonator using the Three-layer Bonding Technique (3중 접합 공정에 의한 MEMS 공진기의 웨이퍼레벨 진공 패키징)

  • Yang, Chung Mo;Kim, Hee Yeoun;Park, Jong Cheol;Na, Ye Eun;Kim, Tae Hyun;Noh, Kil Son;Sim, Gap Seop;Kim, Ki Hoon
    • Journal of Sensor Science and Technology
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    • v.29 no.5
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    • pp.354-359
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    • 2020
  • The high vacuum hermetic sealing technique ensures excellent performance of MEMS resonators. For the high vacuum hermetic sealing, the customization of anodic bonding equipment was conducted for the glass/Si/glass triple-stack anodic bonding process. Figure 1 presents the schematic of the MEMS resonator with triple-stack high-vacuum anodic bonding. The anodic bonding process for vacuum sealing was performed with the chamber pressure lower than 5 × 10-6 mbar, the piston pressure of 5 kN, and the applied voltage was 1 kV. The process temperature during anodic bonding was 400 ℃. To maintain the vacuum condition of the glass cavity, a getter material, such as a titanium thin film, was deposited. The getter materials was active at the 400 ℃ during the anodic bonding process. To read out the electrical signals from the Si resonator, a vertical feed-through was applied by using through glass via (TGV) which is formed by sandblasting technique of cap glass wafer. The aluminum electrodes was conformally deposited on the via-hole structure of cap glass. The TGV process provides reliable electrical interconnection between Si resonator and aluminum electrodes on the cap glass without leakage or electrical disconnection through the TGV. The fabricated MEMS resonator with proposed vacuum packaging using three-layer anodic bonding process has resonance frequency and quality factor of about 16 kHz and more than 40,000, respectively.

Integration of an Optical Waveguide Isolator by Wafer Direct Bonding

  • Roh J. W.;Yang J. S.;Ok S. H.;Choi U. K.;Lee S.;Lee W. Y.
    • Proceedings of the Korean Magnestics Society Conference
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    • 2004.12a
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    • pp.175-176
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    • 2004
  • An integrated waveguide optical isolator by wafer direct bonding has been studied. The isolation ratio was found to be 2.9dB in our device. We found that wafer direct bonding between the InP and GGG is effective for the integration of a waveguide optical isolator.

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Si Micromachining for MEMS-IR Sensor Application (결정의존성 식각/기판접합을 이용한 MEMS용 구조물의 제작)

  • 박홍우;주병권;박윤권;박정호;김철주;염상섭;서상회;오명환
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.10
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    • pp.815-819
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    • 1998
  • The silicon-nirtide membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PRO($PbTiO_3$ ) layer for a IR detection was coated on the membrane and its characteristics were measured. The a attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer were eliminated through the method of bonding/etching of silicon wafer. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by the PTO layer were measured, too.

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A Study on Characterization of P-N Junction Using Silicon Direct Bonding (실리콘 직접 본딩에 의한 P-N 접합의 특성에 관한 연구)

  • Jung, Won-Chae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.10
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    • pp.615-624
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    • 2017
  • This study investigated the various physical and electrical effects of silicon direct bonding. Direct bonding means the joining of two wafers together without an intermediate layer. If the surfaces are flat, and made clean and smooth using HF treatment to remove the native oxide layer, they can stick together when brought into contact and form a weak bond depending on the physical forces at room temperature. An IR camera and acoustic systems were used to analyze the voids and bonding conditions in an interface layer during bonding experiments. The I-V and C-V characteristics are also reported herein. The capacitance values for a range of frequencies were measured using a LCR meter. Direct wafer bonding of silicon is a simple method to fuse two wafers together; however, it is difficult to achieve perfect bonding of the two wafers. The direct bonding technology can be used for MEMS and other applications in three-dimensional integrated circuits and special devices.

An analysis of the Wi-Ni Carbide Alloy Diffusion Bonding technique in its application for DME Engine Fuel Pump

  • Chun, Dong-Joon
    • International Journal of Advanced Culture Technology
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    • v.8 no.2
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    • pp.246-251
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    • 2020
  • Dimethyl Ether(DME) engine use a highly efficient alternative fuel having a great quantity of oxygen and has a advantage no polluting PM gas. The existing DME fuel cam material is a highly expensive carbide alloy, and it is difficult to take a price advantage. Therefore the study of replacing body area with inexpensive steel material excluding piston shoe and contact area which demands high characteristics is needed. The development of WC-Ni base carbide alloy optimal bonding composition technique was accomplished in this study. To check out the influence of bonding temperature and time, bonding characteristics of sintering temperature was experimented. The hardness of specimen and bonding rate were measured using ultrasound equipment. The bonding state of each condition was excellent, and the thickness of mid-layer, temperature and maintaining time were measured. The mid-layer thickness according to bonding temperature and maintaining time were observed with optical microscope. We analyzed the micro-structural analysis, formation of bonding specimen, wafer fabrication and fuel cam abrasion test. Throughout this study, we confirmed that the fuel cam for DME engine which demands high durability against velocity and pressure is excellent.

Low Temperature Hermetic Packaging using Localized Beating (부분 가열을 이용한 저온 Hermetic 패키징)

  • 심영대;김영일;신규호;좌성훈;문창렬;김용준
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2002.10a
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    • pp.1033-1036
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    • 2002
  • Wafer bonding methods such as fusion and anodic bonding suffer from high temperature treatment, long processing time, and possible damage to the micro-scale sensor or actuators. In the localized bonding process, beating was conducted locally while the whole wafer is maintained at a relatively low temperature. But previous research of localized heating has some problems, such as non-uniform soldering due to non-uniform heating and micro crack formation on the glass capsule by thermal stress effect. To address this non-uniformity problem, a new heater configuration is being proposed. By keeping several points on the heater strip at calculated and constant potential, more uniform heating, hence more reliable wafer bonding could be achieved. The proposed scheme has been successfully demonstrated, and the result shows that it will be very useful in hermetic packaging. Less than 0.2 ㎫ contact Pressure were used for bonding with 150 ㎃ current input for 50${\mu}{\textrm}{m}$ width, 2${\mu}{\textrm}{m}$ height and 8mm $\times$ 8mm, 5mm$\times$5mm, 3mm $\times$ 3mm sized phosphorus-doped poly-silicon micro heater. The temperature can be raised at the bonding region to 80$0^{\circ}C$, and it was enough to achieve a strong and reliable bonding in 3minutes. The IR camera test results show improved uniformity in heat distribution compared with conventional micro heaters. For gross leak check, IPA (Isopropanol Alcohol) was used. Since IPA has better wetability than water, it can easily penetrate small openings, and is more suitable for gross leak check. The pass ratio of bonded dies was 70%, for conventional localized heating, and 85% for newly developed FP scheme. The bonding strength was more than 30㎫ for FP scheme packaging, which shows that FP scheme can be a good candidate for micro scale hermetic packaging.

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