• Title/Summary/Keyword: wafer

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Characteristics of c-axis oriented sol-gel derived ZnO films (C-축으로 정렬된 sol-gel ZnO 박막의 특성)

  • 김상수;장기완;김인성;송호준;박일우;이건환;권식철
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.11 no.2
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    • pp.49-55
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    • 2001
  • ZnO films were fabricated on p-type Si(100) wafer ITO glass and quartz glass by the sol-gel process using zinc acetate dihydrate as starting material. A homogeneous and stable solution was prepared by dissolving the zinc acetate dihydrate in a solution of 2-methoxyethanol and monoethanolamine (MEA). ZnO films were deposited by spin-coating at 2800 rpm for 25 s and were dried on a hot plate at $250^{\circ}C$ for 10 min. Crystallization of the films was carried out at $400^{\circ}C$~$800^{\circ}C$ for 1 h in air. X-ray diffraction (XRD) analysis, scanning electron microscopy (SEM), UV-vis transmittance spectroscopy, FTIR transmittance spectroscopy and Photoluminescence (PL) spectroscopy measurements have been used to study the structural and optical properties of the films. ZnO films highly oriented along the (002)plane were obtained. In all cases the films were found to be transparent (above 70%) in visible range with a sharp absorption edge at wavelengths of about 380nm, which is very close to the intrinsic band-gap of ZnO(3.2 eV). The low temperature band-edge photoluminescence revealed a complicated multi-line structure in terms of bound exciton complexes and the phonon replicas.

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Fabrications and Analysis of Schottky Diode of Silicon Carbide Substrate with novel Junction Electric Field Limited Ring (새로운 전계 제한테 구조를 갖는 탄화규소 기판의 쇼트키 다이오드의 제작과 특성 분석)

  • Cheong Hui-Jong;Han Dae-Hyun;Lee Yong-Jae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.7
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    • pp.1281-1286
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    • 2006
  • We have used the silicon-carbide(4H-SiC) instead of conventional silicon materials to develope of the planar junction barrier schottky rectifier for ultra high breakdown voltage(1,200 V grade). The substrate size is 2 inch wafer, Its concentration is $3*10^{18}/cm^{3}$ of $n^{+}-$type, thickness of epitaxial layer $12{\mu}m$ conentration is $5*10^{15}cm^{-3}$ of n-type. The fabticated devices are junction barrier schottky rectifier, The guard ring for improvement of breakdown voltage is designed by the box-like impurity of boron, the width and space of guard ring was designed by variation. The contact metals to rectify were used by the $Ni(3,000\:{\AA})/Au(2,000\:{\AA})$. As a results, the on-state voltage is 1.26 V, on-state resistance is $45m{\Omega}/cm^{3}$, maximum value of improved reverse breakdown voltage is 1180V, reverse leakage current density is $2.26*10^{-5}A/CM^{3}$. We had improved the measureme nt results of the electrical parameters.

Investigation of Co- and Pr-doped yttria-stabilized cubic zirconia (YSZ) single crystal grown by skull melting method (스컬용융법에 의해 성장시킨 Co와 Pr이 첨가된 이트리아안정화큐빅지르코니아(YSZ) 단결정의 연구)

  • Moon, So-I;Seok, Jeong-Won
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.24 no.4
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    • pp.140-144
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    • 2014
  • Co-(0.7 wt%) and Pr-(2.0, 3.5 or 5.0 wt%) doped cubic zirconia ($ZrO_2:Y_2O_3=50:50wt%$) single crystals grown by a skull melting method were heat-treated in $N_2$ at $1150^{\circ}C$ for 5 hrs. The brown colored as-grown single crystals were changed into either dark brownish green, greenish blue and light green color after the heat treatment. Before and after the heat treatment, the YSZ (yttria-stabilized zirconia) single crystals were cut for wafer form (${\phi}7.5mm{\times}t3mm$). The optical and structural properties were examined by UV-VIS spectrophotometer and X-ray diffraction. Absorption by $Co^{2+}$(${\fallingdotseq}589nm$: ${\Gamma}_8[^4A_2(^4F)]{\rightarrow}{\Gamma}_8+{\Gamma}_7[^4T_1(^4F)]$, ${\fallingdotseq}610nm$: ${\Gamma}_8[^4A_2(^4F)]{\rightarrow}{\Gamma}_8[^4T_1(^4F)]$], ${\fallingdotseq}661nm$: ${\Gamma}_8[^4A_2(^4F)]{\rightarrow}{\Gamma}_6[^4T_1(^4F)]$]) and $Pr^{3+}$(${\fallingdotseq}450nm$: ${^3}H{_4}-{^3}P{_2}$, ${\fallingdotseq}473nm$: ${^3}H{_4}{\rightarrow}{^3}P{_1}$, ${\fallingdotseq}484nm$: ${^3}H{_4}{\rightarrow}{^3}P{_0}$), change of ionization energy and lattice parameter were confirmed.

A Miniaturized 2.5 GHz 8 W GaN HEMT Power Amplifier Module Using Selectively Anodized Aluminum Oxide Substrate (선택적 산화 알루미늄 기판을 이용한 소형 2.5 GHz 8 W GaN HEMT 전력 증폭기 모듈)

  • Jeong, Hae-Chang;Oh, Hyun-Seok;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.12
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    • pp.1069-1077
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    • 2011
  • In this paper, a design and fabrication of a miniaturized 2.5 GHz 8 W power amplifier using selectively anodized aluminum oxide(SAAO) substrate are presented. The process of SAAO substrate is recently proposed and patented by Wavenics Inc. which uses aluminum as wafer. The selected active device is a commercially available GaN HEMT chip of TriQuint company, which is recently released. The optimum impedances for power amplifier design were extracted using the custom tuning jig composed of tunable passive components. The class-F power amplifier are designed based on EM co-simulation of impedance matching circuit. The matching circuit is realized in SAAO substrate. For integration and matching in the small package module, spiral inductors and single layer capacitors are used. The fabricated power amplifier with $4.4{\times}4.4\;mm^2$ shows the efficiency above 40 % and harmonic suppression above 30 dBc for the second(2nd) and the third(3rd) harmonic at the output power of 8 W.

Characterization of Optical Properties of Light-Emitting Diodes Grown on Si (111) Substrate with Different Quantum Well Numbers and Thicknesses

  • Jang, Min-Ho;Go, Yeong-Ho;Go, Seok-Min;Yu, Yang-Seok;Kim, Jun-Yeon;Tak, Yeong-Jo;Park, Yeong-Su;Jo, Yong-Hun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.313-313
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    • 2012
  • In recent years there have been many studies of InGaN/GaN based light emitting diodes (LEDs) in order to progress the performance of luminescence. Many previous literatures showed the performance of LEDs by changing the LED structures and substrates. However, the studies carried out by the researchers so far were very complicated and sometimes difficult to apply in practice. Therefore, we propose one simple method of changing the thickness and the numbers of multiple quantum wells (MQWs) in order to optimize their effects. In our research, we investigated electrical and optical properties by changing the well thickness and the number of quantum well (QW) pair in LED structures by growing the structure -inch Si (111) wafer. We defined the samples from LED_1 to LED_3 according to MQW structure. Samples LED_1, LED_2 and LED_3 consist of 5-pair InGaN/GaN (3.5 nm/ 4.5 nm), 5-pair InGaN/GaN (3 nm/4.5 nm) and 7-pair InGaN/GaN (3.5 nm/4.5 nm), respectively. We characterized electrical and optical properties by using electroluminescence (EL) measurement. Also, Efficiency droop was analyzed by calculating external quantum efficiency (EQE) with varying injection current. The EL spectra of three samples show different emission wavelength peaks, FWHM and the blueshift of wavelength caused by screening the internal electric field because of the effect of different MQW structure. The results of optical properties show that the LED_2 sample reduce the internal electric field in QW than LED_1 from EL spectra. the increase in the number of QW pairs reduces the strain and increase the In composition in MQW. And, the points of efficiency droop's peak show different trend from LED_1 to LED_3. It is related with the carrier density in active region. Thus, from the results of experiments, we are able to achieve high performance LEDs and a reduction of efficiency droop and emission wavelength blueshift by optimizing MQWs structure.

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Effect on the surface passivation of i-a-Si:H thin films formed on multi-crystalline Si wafer (유도결합플라즈마 CVD법을 이용한 비정질 실리콘 박막증착을 통한 다결정 실리콘 기판의 표면 passivation 특성평가)

  • Jeong, Chaehwan;Ryu, Sang;Lee, Jong-Ho;Kim, Ho-Sung
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.82.1-82.1
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    • 2010
  • 수소화된 비정질 실리콘 박막을 이용한 반도체는 현재 태양전지, 트랜지스터, 매트릭스 배열 및 이미지 센서 등의 분야에서 이용되고 있다. 자세히 이야기 하면, 여러 가지의 광전효과 물질에 대한 특성이 있으며, 가시광선영역에 대하여 > $10^5cm^{-1}$이상의 매우 높은 광흡수계수와 낮은 온도를 갖는 증착공정 등이 있다. 박막의 밴드갭은 약 1.6~1.8eV로서 태양전지의 흡수층과 passivation층으로 적절하다. 여러 가지 종류의 태양전지 중 비정질 실리콘 박막/결정질 실리콘 기판의 구조로 이루어진 이종접합 태양전지는 저온에서 공정이 가능한 대표적인 것으로서 HIT(Heterojunction with Intrinsic Thin layer)구조로 산요사에 의해 제안된 것이다. 이것은 결정질 실리콘 기판과 도핑된 비정질 실리콘 박막사이에 얇은 진성층 비정질실리콘 박막을 삽입함으로서, 캐리어 전송을 좋게하여 실리콘 기판 표면의 passivation효과를 증대시키는 결과를 가지고 온다. 실험실 규모에서는 약 20%이상의 효율을 보이고 있으며, 모듈에서는 19.5%의 높은 효율을 보이고 있어 실리콘 기판을 이용한 고효율 태양전지로서 각광을 받고 있다. 이러한 이종접합 태양전지의 대부분은 단결정 실리콘을 사용하고 있는데, 점차적으로 다결정 실리콘 기판으로 추세가 바뀌고 있어, 여기에 맞는 표면 passivation 공정 및 분석이 필요하다. 본 발표에서는 다결정 실리콘 기판위에 진성층 비정질 실리콘 박막을 유도결합 플라즈마 화학기상 증착법(ICP-CVD)을 이용하여 제조하여 passivation 효과를 분석한다. 일반적으로 ICP는 CCP(coupled charged plasma)에 비해 약 100배 이상 높은 플라즈마 밀도를 가지고 있으며, 이온 충돌같은 표면으로 작용하는 것들이 기존 방식에 비해서 작다라는 장점이 있다. 먼저, 유리기판을 사용하여 ICP-CVD 챔버내에 이송 한 후 플라즈마 파워, 온도 및 가스비(SiH4/H2)에 따른 진성층 비정질 실리콘 박막을 증착 한 후, 밴드갭, 전도도 및 결합구조 등에 대한 결과를 분석한 후, 최적의 값을 가지고 250um의 두께를 갖는 다결정 실리콘을 기판위에 증착을 한다. 두께(1~20nm)에 따라 표면의 passivation이 되는 정도를 QSSPCD(Quasi steady state Photoconductive Decay)법에 의하여 소수캐리어의 이동거리, 재결합율 및 수명 등에 대한 측정 및 분석을 통하여 다결정 실리콘 기판의 passivation effect를 확인한다. 제시된 데이터를 바탕으로 향후 다결정 HIT셀 제조를 통해 태양전지 효율에 대한 특성을 비교하고자 한다.

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Development on New Laser Tabbing Process for Modulation of Thin Solar Cell (박형 태양 전지 모듈화를 위한 레이져 태빙 자동화 공정(장비) 개발)

  • No, Donghun;Choi, Chul-June;Cho, Hyun Young;Yu, Jae Min;Kim, JungKeun
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.58.1-58.1
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    • 2010
  • In solar cell module manufacturing, single solar cells has to be joined electrically to strings. Copper stripes coated with tin-silver-copper alloy are joined on screen printed silver of solar cells which is called busbar. The bus bar collects the electrons generated in solar cell and it is connected to the next cell in the conventional module manufacturing by a metal stringer using conventional hot air or infrared lamp soldering systems. For thin solar cells, both soldering methods have disadvantages, which heats up the whole cell to high temperatures. Because of the different thermal expansion coefficient, mechanical stresses are induced in the solar cell. Recently, the trend of solar cell is toward thinner thickness below 180um and thus the risk of breakage of solar cells is increasing. This has led to the demand for new joining processes with high productivity and reduced error rates. In our project, we have developed a new method to solder solar cells with a laser heating source. The soldering process using diode laser with wavelength of 980nm was examined. The diode laser used has a maximum power of 60W and a scanner system is used to solder dimension of 6" solar cell and the beam travel speed is optimized. For clamping copper stripe to solar cell, zirconia(ZrO)coated iron pin-spring system is used to clamp both joining parts during a scanner system is traveled. The hot plate temperature that solar cell is positioned during lasersoldering process is optimized. Also, conventional solder joints after $180^{\circ}C$ peel tests are compared to the laser soldering methods. Microstructures in welded zone shows that the diffusion zone between solar cell and metal stripes is better formed than inIR soldering method. It is analyzed that the laser solder joints show no damages to the silicon wafer and no cracks beneath the contact. Peel strength between 4N and 5N are measured, with much shorter joining time than IR solder joints and it is shown that the use of laser soldering reduced the degree of bending of solar cell much less than IR soldering.

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Interface Control to get Higher Efficiency in a-Si:H Solar Cell

  • Han, Seung-Hee;Kim, En-Kyeom;Park, Won-Woong;Moon, Sun-Woo;Kim, Kyung-Hun;Kim, Sung-Min
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.193-193
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    • 2012
  • In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is the most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. Single-chamber PECVD system for a-Si:H solar cell manufacturing has the advantage of lower initial investment and maintenance cost for the equipment. However, in single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of single-chamber PECVD system. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. In order to remove the deposited B inside of the plasma chamber during p-layer deposition, a high RF power was applied right after p-layer deposition with SiH4 gas off, which is then followed by i-layer, n-layer, and Ag top-electrode deposition without vacuum break. In addition to the p-i interface control, various interface control techniques such as FTO-glass pre-annealing in O2 environment to further reduce sheet resistance of FTO-glass, thin layer of TiO2 deposition to prevent H2 plasma reduction of FTO layer, and hydrogen plasma treatment prior to n-layer deposition, etc. were developed. The best initial solar cell efficiency using single-chamber PECVD system of 10.5% for test cell area of 0.2 $cm^2$ could be achieved by adopting various interface control methods.

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A Study on the Breakdown in MHEMTs with InAlAs/InGaAs Heterostructure Grown on the GaAs substrate (InAlAs/InGaAs/GaAs MHEMT 소자의 항복 특성에 관한 연구)

  • Son, Myung-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.11
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    • pp.1-8
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    • 2011
  • One of the most important parameters that limit maximum output power of transistor is breakdown. InAlAs/InGaAs/GaAs Metamorphic HEMTs (MHEMTs) have some advantages, especially for cost, compared with InP-based ones. However, GaAs-based MHEMTs and InP-based HEMTs are limited by lower breakdown voltage for output power even though they have good microwave and millimeter-wave frequency performance with lower minimum noise figure. In this paper, InAlAs/$In_xGa_{1-x}As$/GaAs MHEMTs are simulated and analyzed for breakdown. The parameters affecting breakdown are investigated in the fabricated 0.1-${\mu}m$ ${\Gamma}$-gate MHEMT device having the modulation-doped $In_{0.52}Al_{0.48}As/In_{0.53}Ga_{0.47}As$ heterostructure on the GaAs wafer using the hydrodynamic transport model of a 2D commercial device simulator. The impact ionization and gate field effect in the fabricated device including deep-level traps are analyzed for breakdown. In addition, Indium mole-fraction-dependent impact ionization rates are proposed empirically for $In_{0.52}Al_{0.48}As/In_xGa_{1-x}As$/GaAs MHEMTs.

Formation of Sn-Cu Solder Bump by Electroplating for Flip Chip (플립칩용 Sn-Cu 전해도금 솔더 범프의 형성 연구)

  • 정석원;강경인;정재필;주운홍
    • Journal of the Microelectronics and Packaging Society
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    • v.10 no.4
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    • pp.39-46
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    • 2003
  • Sn-Cu eutectic solder bump was fabricated by electroplating for flip chip and its characteristics were studied. A Si-wafer was used as a substrate and the UBM(Under Bump Metallization) of Al(400 nm)/Cu(300 nm)/Ni(400 nm)/Au(20 nm) was coated sequentially from the substrate to the top by an electron beam evaporator. The experimental results showed that the plating ratio of the Sn-Cu increased from 0.25 to 2.7 $\mu\textrm{m}$/min with the current density of 1 to 8 A/d$\m^2$. In this range of current density the plated Sn-Cu maintains its composition nearly constant level as Sn-0.9∼1.4 wt%/Cu. The solder bump of typical mushroom shape with its stem diameter of 120 $\mu\textrm{m}$ was formed through plating at 5 A/d$\m^2$ for 2 hrs. The mushroom bump changed its shape to the spherical type of 140 $\mu\textrm{m}$ diameter by air reflow at $260^{\circ}C$. The homogeneity of chemical composition for the solder bump was examined, and Sn content in the mushroom bump appears to be uneven. However, the Sn distributed more uniformly through an air reflow.

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