• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.349-350
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• 2010

본 논문에서는 부스트 컨버터와 플라이백 컨버터가 통합된 단일(Single Stage) 역률 보상 회로의 2차측에 Voltage Doubler를 적용한 새로운 역률 보상회로를 제안한다. 제안하는 회로는 불연속 모드(DCM-DCM)로 동작하며, 스위치 전압 및 전류 스트레스를 저감하고 2차측 다이오드의 전압 스트레스를 저감시키는 특징이 있다. 120 V LED 구동 드라이버 사양의 실험을 통해 제안한 회로의 동작을 검증한다.

• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.142-143
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• 2010

An active-clamped current-fed half-bridge converter for the high step-up application is proposed in this paper. The proposed converter is composed of active clamping snubber circuits and a voltage doubler rectifier. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, features, and validity of the proposed circuit, the experimental result for a 200W, 24V input and 400V output prototype are presented.

• Journal of Electrical Engineering and Technology
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• v.2 no.1
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• pp.81-88
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• 2007

This paper proposes a coupled inductor-based rectifier of a Three-Level (TL) DC/DC converter and compares the rectification methods of a TL converter. The CICDR- TL (Coupled Inductor Current Doubler Rectifier Three-Level) converter achieves ZVS (Zero Voltage Switching) for the switches in a wide load range. CDR (Current Doubler Rectifier) and CICDR Three-Level converter have low voltage and current ripple. Advantages and disadvantages of topology compared to the rectifier of bridge, center-tap, CDR, and CICDR are discussed. Experimental estimation results are obtained on a 27V, 60A DC/DC TL converter prototype for the 1.8kW, 40kHz IGBT based experimental circuit.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.1
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• pp.14-21
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• 2006

This paper presents a Zero-Current Switching(ZCS) two-transformer phase-shifted full-bridge(TTFB) converter using voltage ripple. The proposed converter provides Zero-Voltage Switching(ZVS) of leading leg switches and ZCS of lagging leg switches using voltage ripple. Especially, circulating current is reduced by ZCS operation and there are no additional components required for the soft switching of power switches. Furthermore, in case of light load, ZVS operation of lagging leg can be achieved. The operations, analysis and design consideration of proposed converter are presented. To verify the validity of the proposed converter, experimental results for a 410W (205[V], 2[A]) prototype are presented.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.7
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• pp.771-777
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• 2008

In this paper, a frequency doubler using modified time-delay technique is proposed. A voltage controlled delay line (VCDL) in the proposed frequency doubler compensates the group delay time mismatching between input and delayed signal. With the group delay time matching and waveform shaping using the adjustable Schmitt triggers, the unwanted fundamental component($f_0$) and the higher order harmonics such as third and fourth are diminished excellently. In result, only the doubled frequency component($2f_0$) appears dominantly at the output port. The frequency doubler is designed at 1.15 GHz of $f_0$ and fabricated with TSMC $0.18\;{\mu}m$ CMOS process. The measured output power at $2f_0$ is 2.67 dBm when the input power is 0 dBm. The obtained suppression ratio of $f_0,\;3f_0$, and $4f_0$ to $2f_0$ are 43.65, 38.65 and 35.59 dB, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.109-117
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• 2004

In this paper, a K-band local oscillator composed of a VCDRO(Voltage Controlled Dielectric Resonator Oscillator), GaAs MESFET, and Reflector type frequency doubler has been designed and fabricated. TO obtain a good phase noise performance of a VCDRO, a active device was selected with a low noise figure and a low flicker noise MESFET and a dielectric resonator was used for selecting stable and high oscillation frequency. Especially, to have a higher conversion gain than a conventional doubler as well as a good harmonic suppression performance with circuit size reduced a doubler structure was employed as the Reflector type composed of a reflector and a open stub of quarter wave length for rejecting the unwanted harmonics. The measured results of fabricated oscillator show that the output power was 5.8 dBm at center frequency 12.05 GHz and harmonic suppression -37.98 dBc, Phase noise -114 dBc at 100 KHz offset frequency, respectively, and measured results show of fabricated frequency doubler, the output power at 5.8 dBm of input power is 1.755 dBm conversion gain 1.482 dB, harmonic suppression -33.09 dBc, phase noise -98.23 dBc at 100 KHz offset frequency, respectively. This oscillator could be available to a local oscillator in K-band which used frequency doubler techniques.

• Journal of Power Electronics
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• v.19 no.5
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• pp.1099-1107
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• 2019

A soft switching converter with wide voltage range operation is investigated in this paper. A series resonant converter is implemented to achieve a high circuit efficiency with soft switching characteristics on power switches and rectifier diodes. To improve the weakness of the narrow voltage range in LLC converters, an alternating current (ac) power switch is used on the primary side to select a half-bridge or full-bridge resonant circuit to implement 4:1 voltage range operation. On the secondary-side, another ac power switch is adopted to select a full-wave rectifier or voltage-doubler rectifier to achiever an additional 2:1 output voltage range. Therefore, the proposed resonant converter has the capacity for 8:1 (320V~40V) wide output voltage operation. A single-stage hybrid resonant converter is employed in the study circuit instead of a two-stage dc converter to achiever wide voltage range operation. As a result, the study converter has better converter efficiency. The theoretical analysis and circuit characteristics are verified by experiments with a prototype circuit.

• Journal of Electrical Engineering and Technology
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• v.11 no.5
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• pp.1229-1234
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• 2016

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.51 no.10
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• pp.581-586
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• 2002

To improve the current waveform of diode rectifiers, we propose a new operating principle for the voltage-doubler diode rectifiers. In the conventional voltage-doubler rectifier circuit, relatively large capacitors are used to boost the output voltage, while the proposed circuit uses smaller ones and a small reactor not to boost the output voltage but improve the input current waveform. A circuit design method is shown by experimentation and confirmed simulation. The experimental results of the proposed diode rectifier satisfies the harmonic guide lines. A high input power factor of 97(%) and an efficiency of 98[%] are also obtained. The new rectifier with no controlled switches meet the harmonic guide lines, resulting in a simple, reliable and low-cost at-to dc converters in comparison with the boost-type current-improving circuits. This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage. And this paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit is constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is, it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduction and the power factor improvement. Half pulse-width modulated (HPWM) inverter was explained compared with conventional pulse width modulated(PWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Journal of Power Electronics
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• v.18 no.1
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• pp.34-44
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• 2018

This paper presents a pulse-width adjustment (PWA) strategy for a novel bidirectional DC-DC boost converter to improve the performance of the dynamic inductor current response. This novel converter consists of three main components: a full-bridge converter (FBC), a high-frequency isolated transformer with large leakage inductance, and a three-level voltage-doubler rectifier (VDR). A number of scholars have analyzed the principles, such as the soft-switching performance and high-efficiency characteristic, of this converter based on pulse-width modulation plus phase-shift (PPS) control. It turns out that this converter is suitable for energy storage applications and exhibits good performance. However, the dynamic inductor current response processes of control variable adjustment is not analyzed in this converter. In fact, dc component may occur in the inductor current during its dynamic response process, which can influence the stability and reliability of the converter system. The dynamic responses under different operating modes of a conventional feedforward control are discussed in this paper. And a PWA strategy is proposed to enhance the dynamic inductor current response performance of the converter. This paper gives a detailed design and implementation of the PWA strategy. The proposed strategy is verified through a series of simulation and experimental results.