• Proceedings of the KIEE Conference
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• 2001.07d
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• pp.2603-2605
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• 2001

In this paper, we introduce the concept and construction of a web-based bidirectional remote laboratory system. In this configuration, students build and test circuits using internet at home, and the circuit components and experimental equipments at the school are interconnected following student's design. This means that it is possible to choose components, build circuits, connect experiment equipments, control the equipment. and receive measurement results at home in real-time. Labview and Java are used to control this system efficiently and to provide user-friendly environments. Computer-based function generator, DMM, and oscilloscope are used and switch module is used to change interconnections. It was found that a system adopting computer-based instruments, which include PXI/CompactPCI modules and PC plug-in board, provide better performance than that adopting stand-alone instruments connected with GPIB. It is believed that, if this system is installed, the real experiments, not the virtual experiments based on simulation, can be done at home effectively, resulting in revolutional change in engineering education.

• The Journal of the Korea Contents Association
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• v.5 no.4
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• pp.180-187
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• 2005

In this paper, we developed an online lecture for digital logic circuit which is a basic course in electric/electronic education. Because of importance of the laboratory experiences in this course and to reflect industrial requests, we have selected most effective experimental examples in each chapter and inserted instructions for basic usags of ORCAD and digial clock design. Moreover, we developed cyber lab to design students' own circuit using Flash animation. Two features of this cyber lab are real-like graphics for devices and breadboards to improve reality and patented new IC chip objects for easy experiments, which help the students understand digital logic easily.

• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.1928-1934
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• 2014

Induction motors are widely used due to their rugged, robust and easy to care features. Since they are heavily used in industry, testing of three phase induction motors have play a vital role. In order to determine motor equivalent circuit parameters, efficiency of motor, squirrel caged laboratory sized an induction motor test setup is prepared. It is suitable for the induction motor with the frame size of 100 and 112. A virtual Instrumentation typed engineering workbench (called as LabVIEW) software packet, is utilized as a graphical user interface program. Motor input power is measured by measuring the input voltage, current and power factor with the help of hall effect typed voltage and current transformers. Also, the output power is measured by measuring the speed and torque with the help of an encoder and torque sensor. All outputs of the voltage and current transformer, encoder and temperature, torque sensors are given to the Data Acquisition Card (DAQ) which acquires the data for processing and then the equivalent circuit parameters, efficiency, performance and loading characteristics are found out, using LabVIEW based user interface. It is suggested to use this test rig for the quality control of produced motors in industry, and an educational experiment setup in the school laboratories.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.3
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• pp.137-144
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• 2016

In this paper, we have proposed a circuit complexity optimization ILP algorithm of high-level synthesis system for new multiprocessor design. We have analyzed to the operator characteristics and structure of datapath in the most important high-level synthesis. We also introduced the concept of virtual operator for the scheduling of multi-cycle operations. Thus, we demonstrated the complexity to implement a multi-cycle operation of the operator, regardless of the type of operation that can be applied for commonly use in the ILP algorithm. We have achieved is that standard benchmark model for the scheduling of the 5th digital wave filter, it was exactly the same due to the existing datapath scheduling results.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.11a
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• pp.511-514
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• 1998

본 논문은 대용량 통신처리 시스템의 프레임 릴레이망 접속을 통한 인터넷 접속 서비스 기능을 제공하는 프레임 릴레이망 정합 서브 시스템(FNAS : Frame relay Network Access Subsystem)의 설계구조 및 구현사항에 대하여 기술한다. 프레임 릴레이망 정합 서브 시스템은 대용량 통신처리 시스템에 연결되어 전화망(PSTN) 또는 종합 정보통신망(ISDN) 사용자 단말기에 PPP접속기능을 제공하여 프레임 릴레이망에 접속되어 있는 ISP나 CP의 접속을 통한 인터넷 접속 서비스를 제공하거나 정보 제공자(Information Provider)의 DB를 검색하도록 개발하였다.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.979-982
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• 1999

A new accurate as well as efficient multi-layer interconnect capacitance extraction method is presented. Since Multi-layer interconnects is too complicated to directly extract capacitances, it is simplified with virtual ground concept. To make the structure tractable, the shielding effects should be separately determined. Since the electric field shielding effects, and the solid-ground-based capacitance matrices can be readily determined from the layout geometry, the accurate as well as efficient quasi-3D capacitances concerned with an objective line can be readily determined. In order to demonstrate its efficiency and accuracy, the parameters and circuit responses were benchmarked with 3D-field-solver-based results.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.125-128
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• 2000

In this paper, we derive forward link Erlang capacity reflecting both outage probability and blocking probability of each traffic type in mixed traffics environment. We firstly determine the number of available virtual trunks of the forward link from a circuit switching perspective. Then, capacity sharing model and generalized Erlang model are employed to derive joint Erlang capacity of various traffics types.

• Journal of Internet Computing and Services
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• v.16 no.4
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• pp.61-70
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• 2015

This paper presents a web-based Java applet for understanding the concepts in digital logic circuits and student satisfaction survey was carried out in order to show its educational validity. Through our educational Java applet, the learners will be capable of learning the concepts and principles related to digital logic circuit experiments and how to operate virtual experimental equipments and virtual bread board. The proposed educational Java applet is composed of five important components: Principle Classroom to explain the concepts and principles for digital logic circuit operations, Simulation Classroom to provide a web-based simulator to the learners, Virtual Experiment Classroom to provide interactive Java applet about the syllabus of off-line laboratory class, Assessment Classroom, and Management System. With the aid of the Management System every classroom is organically tied together collaborating to achieve maximum learning efficiency. Finally, we have obtained several affirmative effects such as high learning standard, reducing the total experimental hours and the damage rate for experimental equipments.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.6
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• pp.105-109
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• 2012

This paper proposed a method which enabled the designing and implementation of a serious game based on AVR microcontroller on a virtual serial port before making the actual circuit by performing simulation, and which made it possible to develop a serious game. The implemented serious game implemented a mole game which can be enjoyed by one person, a love game with which a male gamer and a female gamer can play, and a marathon game in which a gamer can run the marathon while listening to cheerful music and looking at a region he/she wants to visit. The development of a microcontroller device that provides those functions showed that not only does the device make it possible to develop games more easily and conveniently through the implementation of a game using virtual serial communications with a board designed by an ISIS simulator, but also it reduces trials and errors during game development.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.31 no.6
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• pp.258-263
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• 2021

ZnO varistor is a semiconductor device which can serve to protect the circuit from surge voltage because its non-linear I-V characteristics by controlling the microstructure of grain and grain boundaries. In order to obtain desired electrical properties, it is important to control microstructure evolution during the sintering process. In this research, we defined a dataset composed of process conditions of sintering and relative permittivity of sintered body, and collected experimental dataset with DOE. Meta-models can predict permittivity were developed by learning the collected experimental dataset on various machine learning algorithms. By utilizing the meta-model, we can derive optimized sintering conditions that could show the maximum permittivity from the numerical-based HMA (Hybrid Metaheuristic Algorithm) optimization algorithm. It is possible to search the optimal process conditions with minimum number of experiments if meta-model-based optimization is applied to ceramic processing.