• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.6
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• pp.48-56
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• 2010

Recently, we need to dramatically speed up real-time video encoding and decoding on mobile devices because complexity of video CODEC is significantly increasing along with the demand for multimedia service of high-quality and high-definition videos by users. A variety of research is conducted for parallelism of video processing using newly developed multi-core platforms. In this paper, we propose a method of parallelism based on slice partition of video compression CODEC. We propose a novel concept of a parallel slice for parallelism and propose a new coding order to be adequate to the parallel slice which keeps high coding efficiency. To minimize synchronization time of multiple parallel slices, we also propose a synchronization method to determinate whether the parallel slice could be independently decoded or not. Experimental results shows that we achieved 27.5% (40.7%) speed-up by parallelism with bit-rate increase of 3.4% (2.7%) for CIF sequences (720p sequences) by implementing the proposed algorithm on the H.264/AVC.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.280-280
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• 2004

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.269-269
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• 2004

• The Journal of the Korea Contents Association
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• v.12 no.3
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• pp.77-83
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• 2012

In this paper, a low-complexity embedded compression (EC) Codec algorithm for the wavelet video coder is applied to reduce excessive external memory requirements. The EC algorithm is used to achieve a fixed compression ratio of 50 % under the near-lossless-compression constraint. The EC technique can reduce the 50 % memory requirement for intermediate low-frequency coefficients during multiple discrete wavelet transform stages compared with direct implementation of the wavelet video encoder of this paper. Furthermore, the EC scheme based on a forward adaptive quantization and fixed length coding can save bandwidth and size of buffer between DWT and SPIHT to 50 %. Simulation results show that our EC algorithm present only PSNR degradation of 0.179 and 0.162 dB in average when the target bit-rate of the video coder are 1 and 0.5 bpp, respectively.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.11
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• pp.20-25
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• 2016

This study addresses a low complexity and lossless frame memory compression algorithm based on block-buffer structure for efficient high resolution video processing. Our study utilizes the block-based MHT (modified Hadamard transform) for spatial decorrelation and AGR (adaptive Golomb-Rice) coding as an entropy encoding stage to achieve lossless image compression with low complexity and efficient hardware implementation. The MHT contains only adders and 1-bit shift operators. As a result of AGR not requiring additional memory space and memory access operations, AGR is effective for low complexity development. Comprehensive experiments and computational complexity analysis demonstrate that the proposed algorithm accomplishes superior compression performance relative to existing methods, and can be applied to hardware devices without image quality degradation as well as negligible modification of the existing codec structure. Moreover, the proposed method does not require the memory access operation, and thus it can reduce costs for hardware implementation and can be useful for processing high resolution video over Full HD.

• The KIPS Transactions:PartB
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• v.11B no.2
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• pp.177-186
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• 2004

It is a weak point of the motion estimation technique for video compression that the predicted video encoding algorithm requires higher-order computational complexity. To reduce the computational complexity of encoding algorithms, researchers introduced techniques such as 3D-WT that don't require motion prediction. One of the weakest points of previous 3D-WT studies is that they require too much memory for encoding and too long delay for decoding. In this paper, we propose a technique called `FS (Fast playable and Scalable) 3D-WT' This technique uses a modified Haar wavelet transform algorithm and employs improved encoding algorithm for lower memory and shorter delay requirement. We have executed some tests to compare performance of FS 3D-WT and 3D-V. FS 3D-WT has exhibited the same high compression rate and the same short processing delay as 3D-V has.

• Smart Media Journal
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• v.1 no.1
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• pp.27-35
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• 2012

In this paper, the performance analysis for multimedia video codec(MPEG-4, H.264) on on-chip network communication architecture is presented. The On-Chip Network (OCN) is the new communication architecture of multimedia SoC design that overcomes the limits of On-Chip Bus architecture by providing higher data traffic bandwidth, reusability and higher scalability. We compared the performance of MPEG-4, H.264 decoder based on-chip network and AMBA on-chip bus. Experimental results show that the performance of MPEG-4, H.264 based on on-chip network is improved over 33~56% compared to the design based on AMBA on-chip bus.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2017.06a
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• pp.133-134
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• 2017

본 논문에서는 차세대 방송 표준 ATSC (Advanced Television Systems Committee) 3.0 기반 LDM (Layered Division Multiplexing) 및 스케일러블 비디오 코덱 (Scalable Video Codec) 을 활용한 지상파 방송시스템 기술을 살펴보고 그 성능을 비교 분석한다. 코어 레이어 (Core Layer)와 인핸스드 레이어 (Enhanced Layer)로 구성된 LDM 기반 PLP (Physical Layer Pipe)에, 스케일러블 비디오 코딩이 적용된 베이스 레이어 (Base Layer)와 인핸스먼트 레이어 (Enhancement Layer) 스트림을 각각 전송함으로써 하나의 RF 채널에 두 개 이상의 서비스를 전달할 경우 채널 효율을 극대화 할 수 있다. 본 논문에서는 이동 및 고정용 서비스, 즉 두 개의 서비스를 전송할 때 제안된 LDM 및 스케일러블 비디오 코덱을 사용한 기술과 TDM (Time Division Multiplexing) 및 Simulcast 를 적용한 기술과의 성능 비교를 통해 제안된 기술의 우수성을 검증하고자 한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.10
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• pp.2112-2122
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• 1997

This paper presents a new video codec which is based on 2-D triangular mesh-based motion compensation and two step grid point motion estimation. With this approach the efficiency of compression and the quality of reconstructed images are improved. The compensation of motion for each triangular patch is performed by image warping using motion vectors at the grid points. The prediction error coding and the rate control meet MPEG-4 VM 3.0 specification. The experimental results show that the codec system proposed is simple in complexity and moreover, the quality of decoded images is improved.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.1
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• pp.110-116
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• 2009

It is very important for a DVR system to compress mass video data because they should be able to store#playback of video data. There are several high efficient DVR products using ordinary MPEG-4 compression fur data compression. But most of them support only CIF(D1/4) image, which means degraded image quality in comparison with input image source. In this paper, M-JPEG and H.264 Codec are realized using DSP. To multiple channels system M-JPEG is used for data transmission through network, and Data compression rate is improved as about 4 times as ordinary MPEG-4 compression by supporting Baseline Profile of H.264. As a result, high resolution with the width 720 pixels and the height 480 pixels can be supported.