• 마이크로전자및패키징학회지
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• 제9권4호
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• pp.25-29
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• 2002

기존 홀 센서의 단점을 개선하기 위해서 트랜치를 이용한 수직 홀 센서를 제작하였다. 수직 홀 센서는 센서의 칩 표면에 수평 자계를 검출할 수 있으며, 홀 센서는 실리콘 직접 본딩 기술에 의해 제작된 SOI 기판 위에 제작하였다. 기판 아래의 $SiO_2$층과 마이크로머시닝에 의한 트랜치가 홀 센서의 동작 영역을 정의한다. 홀 센서의 감도는 150V/AT로 측정되었으며 안정된 값을 나타내었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 C
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• pp.2023-2025
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• 2002

We have fabricated a novel vertical trench-Hall device sensitive to the magnetic field parallel to the sensor chip surface. The vertical trench-Hall device is built on SOI wafer which is produced by silicon direct bonding technology using bulk micromachining, where buried $SiO_2$ layer and surround trench define active device volume. Sensitivity up to 350 V/AT is measured.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 추계학술대회 논문집 전기물성,응용부문
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• pp.251-253
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• 2002

We have fabricated a novel Vertical Trench Hall-Effect Device sensitive to the magnetic field parallel to the sensor chip surface for non-contact angular position sensing applications. The Vertical Trench Hall-Effect Device is built on SOI wafer which is produced by silicon direct bonding technology using bulk micromachining, where buried $SiO_2$ layer and surround trench define active device volume. Sensitivity up to 150 V/AT is measured.

• Journal of electromagnetic engineering and science
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• 제18권1호
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• pp.35-40
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• 2018

This study presents a vertical-type CMOS Hall device with improved sensitivity to detect a 3D magnetic field in various types of sensors or communication devices. To improve sensitivity, trenches are implanted next to the current input terminal, so that the Hall current becomes maximum. The effect of the dimension and location of trenches on sensitivity is simulated in the COMSOL simulator. A vertical-type Hall device with a width of $16{\mu}m$ and a height of $2{\mu}m$ is optimized for maximum sensitivity. The simulation result shows that it has a 23% better result than a conventional vertical-type CMOS Hall device without a trench.