The Vertical Trench Hall-Effect Device Using SOI Wafer

SOI Wafer를 사용한 트렌치 구조의 수직 Hall 소자의 제작

  • Park, Byung-Hwee (School of Electronics and Information engineering, Yeungnam University) ;
  • Jung, Woo-Chul (School of Electronics and Information engineering, Yeungnam University) ;
  • Nam, Tae-Chul (School of Electronics and Information engineering, Yeungnam University)
  • 박병휘 (영남대학교 전자정보공학부) ;
  • 정우철 (영남대학교 전자정보공학부) ;
  • 남태철 (영남대학교 전자정보공학부)
  • Published : 2002.07.10

Abstract

We have fabricated a novel vertical trench-Hall device sensitive to the magnetic field parallel to the sensor chip surface. The vertical trench-Hall device is built on SOI wafer which is produced by silicon direct bonding technology using bulk micromachining, where buried $SiO_2$ layer and surround trench define active device volume. Sensitivity up to 350 V/AT is measured.

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