• 제목/요약/키워드: variable gain

검색결과 511건 처리시간 0.027초

An Inherently dB-linear All-CMOS Variable Gain Amplifier

  • Kwon, Ji-Wook;Ryu, Seung-Tak
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제11권4호
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    • pp.336-343
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    • 2011
  • This paper introduces a simple variable gain amplifier (VGA) structure that shows an inherently dB-linear gain control property. Requiring no additional components for dB-linear control, the structure is compact and power efficient. The designed two-stage VGA shows a gain control range of 60dB with the gain error in the range of ${\pm}0.4$ dB. The power consumption including the output buffer is 20.4 mW from 1.2 V supply voltage with bandwidth of 630 MHz. The prototype was fabricated in a 0.13 ${\mu}m$ CMOS process and the VGA core occupies 0.06 $mm^2$.

가변 스텝 적응적 루프를 이용한 직접 변환 방식 수신기에서의 이득 및 위상 불일치 보상 알고리즘 (I/Q Gain and Phase Imbalances Compensation Algorithm by using Variable Step-size Adaptive Loops at Direct Conversion Receiver)

  • 송윤정;나성웅
    • 한국전자파학회논문지
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    • 제14권10호
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    • pp.1104-1111
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    • 2003
  • 본 논문에서는 직접 변환 방식의 수신기에서 발생하는 I 채널 및 Q 채널 간의 이득 및 위상 불일치를 보상하는 방법에 대해서 기술한다. 직접 변환 방식의 복조기에서의 이득 및 위상 불일치를 가변 스텝(Variable Step-size) 적응적 루프를 이용하여 블라인드(blind) 등화 방식으로 보상하는 알고리즘을 된 논문에서 제안한다. 이득 및 위상 불일치를 보상하기 위해 일반적인 블라인더 등화 기법을 이용할 경우 루프 이득에 따라 수렴속도와 지터(jitter) 영향이 trade-off 관계에 있다. 본 논문에서는 이들 문제를 극복하기 위하여 적응적 루프의 이득을 오차에 따라 가변 하는 방법을 제시한다. 본 논문에서는 가변 스텝 적응적 루프를 이용하여 빠른 수렴속도와 지터의 영향을 줄이도록 하는 방법을 제시하였고, 모의실험을 통하여 신호 손실 보상과 수렴 속도의 향상을 확인한다.

Bias Reduction in Split Variable Selection in C4.5

  • Shin, Sung-Chul;Jeong, Yeon-Joo;Song, Moon Sup
    • Communications for Statistical Applications and Methods
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    • 제10권3호
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    • pp.627-635
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    • 2003
  • In this short communication we discuss the bias problem of C4.5 in split variable selection and suggest a method to reduce the variable selection bias among categorical predictor variables. A penalty proportional to the number of categories is applied to the splitting criterion gain of C4.5. The results of empirical comparisons show that the proposed modification of C4.5 reduces the size of classification trees.

청각 유모세포를 모사한 미소기계적 능동 증폭기 (Haircell-inspired Micromechanical Active Amplifiers Using the Mechanical Resonance Modulated by Variable Stiffness Springs)

  • 허윤정;이원철;김태윤;조영호
    • 대한기계학회논문집A
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    • 제31권11호
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    • pp.1077-1082
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    • 2007
  • We present a micromechanical active amplifier, inspired from the principle of the outer hair cells in cochlea, amplifying both displacement and force. The present micromechanical active amplifier modulates the resonant carrier motion using the variable stiffness spring whose stiffness changes proportionally to the input motion. We design, fabricate, and characterize two types of the amplifiers A and B, each having the variable stiffness spring fur the maximum displacement gain and force gain, respectively. In the experimental study, the amplifier A shows the displacement gain of 5.62, which is 2.15 times larger than that of the amplifier 3. The amplifier B shows the force gain of 10.0, resulting in 1.26 times larger value compared to that of the amplifier A. We experimentally verify that the haircell-inspired micromechanical amplifiers are capable to amplify both displacement and force.

이중모우드 가변 변환이득 믹서의 전력 효율 특성 (DC Power Dissipation Characteristics for Dual-mode Variable Conversion Gain Mixer)

  • 박현우;구경헌
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.113-114
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    • 2006
  • In this paper, dual-gate mixer has been designed and optimized to have variable conversion gain for WiBro and WLAN applications and to save power. With the LO power of 0dBm and RF power of -50dBm, the mixer shows 15dB conversion gain. When RF power increases from -50dBm to -20dBm, the conversion gain decreases to -2dB with bias change. The variable conversion gain can reduce the high dynamic range requirement of AGC burden at IF stage. Also, it can save the dc power dissipation of mixer up to 90%.

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Monolithic SiGe HBT Feedforward Variable Gain Amplifiers for 5 GHz Applications

  • Kim, Chang-Woo
    • ETRI Journal
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    • 제28권3호
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    • pp.386-388
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    • 2006
  • Monolithic SiGe heterojunction bipolar transistor (HBT) variable gain amplifiers (VGAs) with a feedforward configuration have been newly developed for 5 GHz applications. Two types of the feedforward VGAs have been made: one using a coupled-emitter resistor and the other using an HBT-based current source. At 5.2 GHz, both of the VGAs achieve a dynamic gain-control range of 23 dB with a control-voltage range from 0.4 to 2.6 V. The gain-tuning sensitivity is 90 mV/dB. At $V_{CTRL}$= 2.4 V, the 1 dB compression output power, $P_{1-dB}$, and dc bias current are 0 dBm and 59 mA in a VGA with an emitter resistor and -1.8 dBm and 71mA in a VGA with a constant current source, respectively.

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A Single-Stage 37 dB-Linear Digitally-Controlled Variable Gain Amplifier for Ultrasound Medical Imaging

  • Cho, Seong-Eun;Um, Ji-Yong;Kim, Byungsub;Sim, Jae-Yoon;Park, Hong-June
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권5호
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    • pp.579-587
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    • 2014
  • This paper presents a variable gain amplifier (VGA) for an analog front-end (AFE) of ultrasound medical imaging. This VGA has a closed-loop topology and shows a 37-dB-linear characteristic with a single-stage amplifier. It consists of an op-amp, a non-binary-weighted capacitor array, and a gain-control block. This non-binary-weighted capacitor array reduces the required number of capacitors and the complexity of the gain-control block. The VGA has been fabricated in a 0.35-mm CMOS process. This work gives the largest gain range of 37 dB per stage, the largest P1 dB of 9.5 dBm at the 3.3-V among the recent VGA circuits available in the literature. The voltage gain is controlled in the range of [-10, 27] dB in a linear-in-dB scale with 16 steps by a 4-bit digital code. The VGA has a bandpass characteristic with a passband of [20 kHz, 8 MHz].

피드백 저항 제어에 의한 무선랜용 가변이득 저전압구동 저잡음 증폭기 MMIC (A Variable-Gain Low-Voltage LNA MMIC Based on Control of Feedback Resistance for Wireless LAN Applications)

  • 김근환;윤경식;황인갑
    • 한국통신학회논문지
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    • 제29권10A호
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    • pp.1223-1229
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    • 2004
  • 본 논문에서 ETRI 0.5$\mu\textrm{m}$ MESFET 라이브러리 공정을 이용하여 동작 주파수 5GHz대 저전압구동 가변이득 저잡음 증폭기 MMIC를 설계 및 제작하였다. 이 저잡음 증폭기는 HIPERLAN/2의 Adaptive Antenna Arrays와 함께 사용할 수 있도록 이득조절이 가능하도록 설계하였다. 가변이득 저잡음 증폭기는 2단 캐스케이드 구조이며, 게이트전압에 따라 채널저항이 제어되는 증가형 MESFET과 저항으로 구성된 부귀환 회로를 제안하였다. 제작된 가변이득 저잡음 증폭기의 측정값은 $V_{DD}$ =1.5V, $V_{GG1}$=0.4V, $V_{GG2}$=0.5V일때 5.5GHz의 중심 주파수, 14.7dB의 소신호 이득, 10.6dB의 입력 반사손실, 10.7dB의 출력 반사손실, 14.4dB의 가변이득, 그리고 잡음지수 2.98dB이다. 또한, 가변이득 저잡음 증폭기는 -19.7dBm의 입력 PldB, -10dBm의 IIP3, 52.6dB의 SFBR, 그리고 9.5mW의 전력을 소비한다.다.다.

ATM 멀티플렉서의 설계를 위한 다중화이득과 가변입력비트율과의 관계 해석 (An Analysis on Multiplexing Gain vs. Variable Input Bit Rate Relation for Designing the ATM Multiplexer)

  • 여재흥;임인칠
    • 전자공학회논문지A
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    • 제29A권8호
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    • pp.34-40
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    • 1992
  • This paper shows a new relational formula of multiplexing gain versus variable input bit rates useful for designing Nx1 ATM(Asynchronous Transfer Mode) multiplexer which mixes several asynchronous bit streams with different transmission rates. The relation between multiplexing gain and input bit stream speeds is derived from the occupied mean lenght(the width per unit time) of cells and the occupation probability of the number of cells at an arbitrary instant when the rates of the periodic cell strams change randomly. And the relation between multiplexing gain and variable bit rates from different number of input bit streams is analyzed accordingly. Under the condition of unlimited multiplexing speed, the more number of input bit streams increases, the bigger the multiplexing gain becomes. While for the case which restricts the multiplexing speed to a limited value, the multiplexing gain becomes smaller contrarily as the number of input bit streams continues too invrease beyond a boundary value. It is shown that for designing an ATM multiplexer according to the latter case, the combination of input bit streams should be determined such as its total bit rate is lower thean, but most apprpaximate to, the multiplexed output speed. Also the general formula evaluating the most significant parameters which should be needed to design the multiplexer is derived.

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가변이득을 가지는 디지털제어 단상 역률보상회로 (Single-Phase Power Factor Correction(PFC) Converter Using the Variable gain)

  • 백주원;신병철;정창용;이영운;유동욱;김홍근
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.240-243
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    • 2001
  • This paper presents the digital controller using variable gain for single-phase power factor correction (PFC) converter. Generally, the gain of inner current control loop in single-stage PFC converter has a constant magnitude. This is why input current is distorted under low input voltage. In particular, a digital controller has more time delay than an analog controller which degrades characteristics of control loop. So, it causes the problem that the gain of current control loop isn't increased enough. In addition, the oscillation happens in the peak value of the input voltage open loop PFC system gain changes according to ac input voltage. These aspects make the design of the digital PFC controller difficult. In this paper, the improved digital control method for single-phase power factor converter is presented. The variable gain according to input voltage and input current help to improve current shape. The 800W converter is manufactured to verify the proposed control method.

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