• Journal of IKEEE
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• v.6 no.2 s.11
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• pp.111-118
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• 2002

In this paper, we present a variable block method to reduce additive computational requirements in determining step-size of variable step-size LMS (VS-LMS) algorithms. The block length is inversely proportional to the changing of step-size in VS-LMS algorithm. The technique reduces computational requirements of the conventional VS-LMS algorithms without a degradation of performance in convergence rate and steady state error. And a method for deriving initial step-size, when the input is zero mean, white Gaussian sequence, is proposed. For demonstrating the good performances of the proposed method, simulation results are compared with the conventional variable step-size algorithms in convergence speed and computational requirements.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.6
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• pp.1419-1427
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• 2007

In this paper, we propose an algorithm which implements a multi-sided side match finite-state vector quantization(MSMVQ). After extracting the edge information from an image and classifying the image into edge blocks or non-edge blocks, we construct an edge map. We subdivide edge blocks into sixteen classes using discrete cosine transform(DCT) AC coefficients. Based on edge map information, a state codebook is made from the master codebook, and side match calculation is done for two-sided or three-sided current block of image. For reducing transmitted bits, a decision is made whether or not to encode the non-edge blocks among the pre-coded blocks by using the master codebook. Also for reducing allocation bits of codeword indices to decoder, a variable length coder is used. Considering the comparison with side match finite-state vector quantization(SMVQ) and two-sided SMVQ(TSMVQ) algorithm about Zelda, Lenna, Bridge and Peppers image, the new algorithm shows better picture quality than SMVQ and TSMVQ respectively.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.759-760
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• 2006

In this paper, The author designed on high speed VLD(Variable Length Decoder) using shift buffer. Variable Length Decoder is received N bit data from input block and decode the input signal using Shifting Buffer, Length Decoder and Symbol Decoder blocks. The inner part of shifting buffer in proposed Variable Length Decoder is filled input data and then operating therefore, the proposed structure can improve the decoded speed. And in this paper we applying pipeline structure therefore data is decoded in every clock.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.3A
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• pp.356-359
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• 2006

A monolithic SiGe HBT variable gain driver amplifier(VGDA) with high dB-linear gain control and high linearity has been developed as a driver amplifier with ground-shielded microstrip lines for 5-GHz transmitters. The VGDA consists of three blocks such as the cascode gain-control stage, fixed-gain output stage, and voltage control block. The circuit elements were optimized by using the Agilent Technologies' ADSs. The VGDA was implemented in STMicroelectronics' 0.35${\mu}m$ Si-BiCMOS process. The VGDA exhibits a dynamic gain control range of 34 dB with the control voltage range from 0 to 2.3 V in 5.15-5.35 GHz band. At 5.15 GHz, maximum gain and attenuation are 10.5 dB and -23.6 dB, respectively. The amplifier also produces a 1-dB gain-compression output power of -3 dBm and output third-order intercept point of 7.5 dBm. Input/output voltage standing wave ratios of the VGDA keep low and constant despite change in the gain-control voltage.

• Genomics & Informatics
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• v.21 no.3
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• pp.28.1-28.13
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• 2023

Mild cognitive impairment (MCI) is a clinical syndrome characterized by the onset and evolution of cognitive impairments, often considered a transitional stage to Alzheimer's disease (AD). The genetic traits of MCI patients who experience a rapid progression to AD can enhance early diagnosis capabilities and facilitate drug discovery for AD. While a genome-wide association study (GWAS) is a standard tool for identifying single nucleotide polymorphisms (SNPs) related to a disease, it fails to detect SNPs with small effect sizes due to stringent control for multiple testing. Additionally, the method does not consider the group structures of SNPs, such as genes or linkage disequilibrium blocks, which can provide valuable insights into the genetic architecture. To address the limitations, we propose a Bayesian bi-level variable selection method that detects SNPs associated with time of conversion from MCI to AD. Our approach integrates group inclusion indicators into an accelerated failure time model to identify important SNP groups. Additionally, we employ data augmentation techniques to impute censored time values using a predictive posterior. We adapt Dirichlet-Laplace shrinkage priors to incorporate the group structure for SNP-level variable selection. In the simulation study, our method outperformed other competing methods regarding variable selection. The analysis of Alzheimer's Disease Neuroimaging Initiative (ADNI) data revealed several genes directly or indirectly related to AD, whereas a classical GWAS did not identify any significant SNPs.

• ETRI Journal
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• v.25 no.6
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• pp.489-502
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• 2003

This paper presents an MPEG-4 video codec, called MoVa, for video coding applications that adopts 3G-324M. We designed MoVa to be optimal by embedding a cost-effective ARM7TDMI core and partitioning it into hardwired blocks and firmware blocks to provide a reasonable tradeoff between computational requirements, power consumption, and programmability. Typical hardwired blocks are motion estimation and motion compensation, discrete cosine transform and quantization, and variable length coding and decoding, while intra refresh, rate control, error resilience, error concealment, etc. are implemented by software. MoVa has a pipeline structure and its operation is performed in four stages at encoding and in three stages at decoding. It meets the requirements of MPEG-4 SP@L2 and can perform either 30 frames/s (fps) of QCIF or SQCIF, or 7.5 fps (in codec mode) to 15 fps (in encode/decode mode) of CIF at a maximum clock rate of 27 MHz for 128 kbps or 144 kbps. MoVa can be applied to many video systems requiring a high bit rate and various video formats, such as videophone, videoconferencing, surveillance, news, and entertainment.

• Korean Journal of Computational Design and Engineering
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• v.8 no.4
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• pp.254-261
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• 2003

In mold and die shops, NC machining process mainly affects the quality of the machined surface and the manufacturing time of molds and dies. The estimation of NC machining time is a prerequisite to measure the machining productivity and to generate a process schedule, which generally includes the process sequence and the completion time of each process. It is required to take into account dynamic characteristics in the estimation, such as the ac/deceleration of NC machine controllers. Intensive observations at start and end points of NC blocks show that a minimum feedrate, a key variable in a machining time model, has a close relation to a block distance, an angle between blocks, and a command feedrate. Thus, this study addresses regression models for the minimum feedrate estimation on short and long NC blocks considering these parameters. Furthermore, machining time estimation models by the four types of feedrate behaviors are suggested based on the estimated minimum feedrate. To show the validity of the proposed machining time model, the study compares the estimated with the actual machining time in the sculptured surface machining of several mold dies.

• Asian-Australasian Journal of Animal Sciences
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• v.9 no.2
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• pp.127-132
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• 1996

Effects on feed intake, liveweight gain and economic benefits of supplementing lambs with urea molasses blocks, were studied. Forty eight crossbred lambs were divided into 6 groups and assigned randomly to grazing on native pasture (CONT) or along with supplements of Commercial ration (COM) and urea molasses blocks (UMBs) containing two levels of cement and calcium oxide as a binding agent. Analysis of variance revealed highly significant (p<0.01) differences in dry matter (DMI, g/day), crude protein (CPI, g/day) and metabolizable energy (MEI, MJ/day) intakes. Differences in liveweight gain (LWG, g/day), feed conversion ratio (FCR) and net economic benefit of supplementation were also highly variable. The intake of DM, CP and ME varied from 974 to 1002, 66-70 and 7.6-8.4 in lambs supplemented with UMBs, significantly (p<0.01) greater than 848, 52.5 and 5.6 in lambs supplemented with COM or FCR and net economic benefits (54.3; 57.8; 17.1 and 1.96; 2.4) in lambs supplemented with COM and UMB-2, were CONT or supplemented with UMB-1, UMB-3 and UMB-4 respectively. Factors responsible for differences in feed intake, liveweight gain and economic benefits, are discussed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4C
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• pp.253-261
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• 2005

In this paper, we propose an efficient block-based disparity estimation algorithm fur multiple view image coding in EE2 and EE3 in 3DAV. The proposed method emphasizes on visual quality improvement to satisfy the requirements for multiple view generation. Therefore, we perform an adaptive disparity estimation that constructs variable blocks by considering given image features. Examining neighboring features around desired block search range is set up to decrease complexity and additional information than only using quad-tree coding through applying binary-tree and quad-tree coding by taking into account stereo image feature having big disparity. The experimental results show that the proposed method improves PSNR about 1 to 2dB compared to existing other methods and decreases computational complexity up to maximum 68 percentages than FBMA.

• Journal of KIISE:Software and Applications
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• v.32 no.8
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• pp.795-807
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• 2005

The classical approaches for computing Live Variable Analysis(LVA) use iterative algorithms across the entire programs based on the Data Flow Analysis framework. In case of Zephyr compiler, average execution time of LVA takes $7\%$ of the compilation time for the benchmark programs. The classical LVA algorithm has many aspects for improvement. The iterative algorithm for LVA scans useless basic blocks and calculates large sets of variables repeatedly. We propose the improvement of Iterative algorithm for LVA based on used variables' upward movement. Our algorithm produces the same result as the previous iterative algorithm. It is based on use-def chain. Reordering of applying the flow equation in DFA reduces the number of visiting basic blocks and redundant flow equation executions, which improves overall processing time. Experimental results say that our algorithm ran reduce $36.4\%\;of\;LVA\;execution\;time\;and\;2.6\%$ of overall computation time in Zephyr compiler with benchmark programs.