• 한국전자파학회논문지
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• 제23권7호
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• pp.784-790
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• 2012

본 논문에서는 UWB의 6~10 GHz 주파수 대역을 위한 디지털 방식의 CMOS UWB 펄스 발생기를 제안하였다. 제안된 펄스 발생기는 매우 적은 전력 소모와 간단한 구조로 설계 및 구현되었다. 이 펄스 발생기는 가변되는 shunt capacitor 방식으로 구성된 CMOS delay line을 사용하여 중심 주파수를 제어할 수 있게 하였고, Gaussian Pulse Shaping 회로를 이용하여 FCC 등에서 제시하는 UWB 스펙트럼 규정을 만족할 수 있도록 설계하였다. 측정결과, 가변 가능한 중심 주파수는 4.5~7.5 GHz까지 자유롭게 조절이 가능하였고, 펄스의 폭은 대략 1.5 ns였다. 그리고 10 MHz의 PRF 조건에서 310 mV pp의 크기의 펄스 신호를 보여주었다. 회로는 0.13 um CMOS 공정으로 제작되었고, 코어의 크기는 $182{\times}65um^2$로 매우 작은 크기로 설계되었으며, 평균 소모 전력은 1.5 V 전원을 사용하는 출력 buffer에서 11.4 mW를 소모하고, 이를 제외한 코어에서는 0.26 mW의 매우 작은 전력을 소모하고 있다.

• IEIE Transactions on Smart Processing and Computing
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• 제4권5호
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• pp.354-365
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• 2015

This work presents an Internet of Things (IoT) system for home energy management based on a custom-designed Impulse Radio Ultra-Wideband (IR-UWB) transceiver that targets a generic and multi-standard control system. This control system enables the interoperability of heterogeneous devices: it integrates various sensor nodes based on ZigBee, EnOcean and UWB in the same middleware by utilizing an ad-hoc layer as an interface between the hardware and software. The paper presents as a first the design of the IR-UWB transceiver for a portable sensor node integrated with the middleware layer, and also describes the receiver connected to the control system. The custom-designed low-power transmitter on the sensor node is fabricated with 130 nm CMOS technology. It generates a signal with a 1.1 ns pulse width while consuming $39{\mu}W$ at 1 Mbps. The UWB sensor node with a temperature measurement capability consumes 5.31 mW, which is lower than the power level of state-of-the-art solutions for smart-home applications. The UWB hardware and software layers necessary to interface with the control system are verified in over-the-air measurements in an actual office environment. With the implementation of the presented sensor node and its integration in the energy management system, we demonstrate achievement of the broad flexibility demanded for IoT.

• 소성∙가공
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• 제11권1호
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• pp.24-35
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• 2002

Recent trend and future prospect of flat rolling of steel has been summarized based on the earlier reports. Key technology in the plate rolling is to have ultra fine microstructure having high resistance against crack propagation during application. Heavy accelerated cooling facility and high power rolling mill will be helpful to develope the high toughness steel. Precise modeling of properly prediction based on deformation and transformation imposed on microstructure of steel during processing is highly anticipated. For the hot strip rolling process, new trend is lies on the production of ultra-thin gauged hot strip to substitute cold rolled strip. For the substitution of cold rolled strip into hot rolled strip widely, high formable property of hot strip is highly required. For the formabilit, the ferritic rolling of extra low carbon steel under high lubricated condition is essential. Recently introduced semi-continuous thin slab and rolling mill line is very plausible to develope those kinds of products easily In the view groin facility combination. New idea to modify the existing continuous hot strip mill line to produce the ultra thin-gauged hot strip in an economic way is suggested in this report.

• 한국기계가공학회지
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• 제19권4호
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• pp.1-8
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• 2020

Mechanical components that support structures in aerospace and power generation industries require high-strength materials. Particularly, in the aerospace industry, aluminum alloys, titanium alloys, and composite materials are increasingly used due to their high maneuverability and durability to withstand low temperature extreme environments; however, ultra-high-strength steel is still used in key components under heavy loads such as landing gears. In this paper, the fault cause analysis and troubleshooting of aircraft parts made of ultra-high-strength steel (300M) broken during normal operation are described. To identify the cause of the defect, a temporary inspection of the same aircraft was performed, and material testing, non-destructive inspection, microstructure examination, and fracture area inspection of the damaged parts were performed. Fracture analysis results showed that a crack in the shape of a branch developed from the tool mark in the direction of the intergranular strain. Based on the results, the cause of fracture was confirmed to be stress corrosion.

• ETRI Journal
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• 제27권5호
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• pp.579-584
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• 2005

A CMOS direct-conversion mixer with a single transistor-level topology is proposed in this paper. Since the single transistor-level topology needs smaller supply voltage than the conventional Gilbert-cell topology, the proposed mixer structure is suitable for a low power and highly integrated RF system-on-a-chip (SoC). The proposed direct-conversion mixer is designed for the multi-band ultra-wideband (UWB) system covering from 3 to 7 GHz. The conversion gain and input P1dB of the mixer are about 3 dB and -10 dBm, respectively, with multi-band RF signals. The mixer consumes 4.3 mA under a 1.8 V supply voltage.

• ETRI Journal
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• 제29권5호
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• pp.670-672
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• 2007

An ultra-wideband low-noise amplifier is proposed with operation up to 8.2 GHz. The amplifier is fabricated with a 0.18-${\mu}m$ CMOS process and adopts a two-stage cascode architecture and a simplified Chebyshev filter for high gain, wide band, input-impedance matching, and low noise. The gain of 19.2 dB and minimum noise figure of 3.3 dB are measured over 3.4 to 8.2 GHz while consuming 17.3 mW of power. The Proposed UWB LNA achieves a measured power-gain bandwidth product of 399.4 GHz.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2007년도 하계종합학술대회 논문집
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• pp.433-434
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• 2007

This paper describes a low-voltage dynamic random-access memory (DRAM) focusing on subthreshold leakage reduction during self-refresh (sleep) mode. By sharing a power switch, multiple iterative circuits such as row and column decoders have a significantly reduced subthreshold leakage current. To reduce the leakage current of complex logic gates, dual channel length scheme and input vector control method are used. Because all node voltages during the standby mode are deterministic, zigzag super-cutoff CMOS is used, allowing to Preserve internal data. MTCMOS technique Is also used in the circuits having no need to preserve internal data. Sub-1.2-V 1-Gb mobile DDR DRAM employing all these low-power techniques was designed in a 60 nm CMOS technology and achieved over 77% reduction of overall leakage current during the self-refresh mode.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권6호
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• pp.745-753
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• 2016

This paper presents a fully synthesizable low power interconnect bus for millimeter-scale wireless sensor nodes. A segmented ring bus topology minimizes the required chip real estate with low input/output pad count for ultra-small form factors. By avoiding the conventional open drain-based solution, the bus can be fully synthesizable. Low power is achieved by obviating a need for local oscillators in member nodes. Also, aggressive power gating allows low-power standby mode with only 53 gates powered on. An integrated wakeup scheme is compatible with a power management unit that has nW standby mode. A 3-module system including the bus is fabricated in a 180 nm process. The entire system consumes 8 nW in standby mode, and the bus achieves 17.5 pJ/bit/chip.

• 한국통신학회논문지
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• 제36권12B호
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• pp.1548-1555
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• 2011

UDSM(Ultra Deep SubMicron)기술을 이용한 시스템 온-칩 설계 시 가창 중요한 설계 요소는 버스 상에서의 전력소모와 지연시간을 최소화 하는 것이다. 인접한 선에서 발생되는 crosstalk는 전파 지연을 발생시키는데 지대한 영향을 미치며, 이를 제거하거나 최소화 시키는 일은 SoC(System on a Chip) 설계에서 시스템의 신뢰성 및 성능 향상과 직결된다. 기존의 방법들은 주로 crosstalk 지연이나 버스 스위칭 횟수 중 하나 만을 최소화하는 방법이 제안되었다. 본 논문에서는 인코딩 적용 4 비트 클러스터 상의 버스 스위칭 횟수에 따라 crosstalk과 스위칭 횟수를 동시에 최소화 할 수 있도록 "invert" 기능과 "logic-convert" 기능을 적응적으로 선택하는 새로운 인코딩 기법을 제안한다. 실험결과 제안한 버스 인코딩 기법은 완벽하게 crosstalk 지연를 제거한 반면, 기존의 다른 방법들에 비해 25% 이상 전력을 절약하였음을 보여준다.

• 전자통신동향분석
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• 제38권1호
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• pp.36-45
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• 2023

The increasing demand for ultra-high efficiency of compact power conversion systems for electric vehicle applications has brought GaN power semiconductors to the fore due to their low conduction losses and fast switching speed. In particular, the development of materials and core device processes contributed to remarkable results regarding the publication of vertical GaN power devices with high breakdown voltage. This paper reviews recent advances on GaN material technology and vertical GaN power device technology. The GaN material technology covers the latest technological trends and GaN epitaxial growth technology, while the vertical GaN power device technology examines diodes, Trench FETs, JFETs, and FinFETs and reviews the vertical GaN PiN diode technology developed by ETRI.