• Journal of Advanced Navigation Technology
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• v.11 no.3
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• pp.274-280
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• 2007

An ultra-wideband signal is characterized by a radiated spectrum with wide bandwidth around a relatively low center frequency. In this paper, the bit error rate (BER), packet error rate (PER), and data throughput performance for an ultra-wideband system with M-ary correlation receiver are analyze in additive white Gaussian noise (AWGN) and co-channel interference channel. To evaluate the performance of UWB system, a set of UWB communication waveform as pulse position modulated (PPM) signals consisting of more than one UWB pulse is used. The M-ary PPM signals are defined to be equally correlated in order to simplify the system performance analysis. The analysis for system performance shows that the wireless channel error significantly degrades throughput performance and can be effectively increased by hybrid ARQ scheme. Also, an attempt for comparing the data throughput of ultra-wideband system on different performance improvement schemes and parameters has been made. From the performance evaluation process, it is shown that the effects of wireless channel and hybrid ARQ scheme for ultra wideband M-ary PPM system can be evaluated by means of a suitable combination of the PER, throughput vs. signal-to-noise power ratio per bit.

• Journal of Power Electronics
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• v.19 no.3
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• pp.645-654
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• 2019

In this paper, a new high step up DC/DC converter with a modified super-lift technique is presented. The coupled inductor technique is combined with the super-lift technique to provide a tenfold or more voltage gain with a proper duty cycle and a low turn ratio. Due to a high conversion ratio, the voltage stress on the semiconductor devices is reduced. As a result, low voltage ultra-fast recovery diodes and low on resistance MOSFET can be used, which improves the reverse recovery problems and conduction losses. This converter employs a passive clamp circuit to recycle the energy stored in the leakage inductance. The proposed convertor features a high conversion ratio with a low turn ratio, low voltage stress, low reverse recovery losses, omission of the inrush currents of the switch capacitor loops, high efficiency, small volume and reduced cost. This converter is suitable for renewable energy applications. The operational principle and a steady-state analysis of the proposed converter are presented in details. A 200W, 30V input, 380V output laboratory prototype circuit is implemented to confirm the theoretical analysis.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.7 no.5
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• pp.1094-1107
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• 2013

NTRU cryptosystem has been suggested for protecting wireless body area networks, which is secure in the sense of traditional cryptanalysis. In this paper, we fulfill the first power analysis attack on the ultra-low-power environment of wireless body area networks. Specifically, two practical differential power analyses on NTRU algorithm are proposed, which can attack the existing countermeasures of NTRU. Accordingly, we suggest three countermeasures against our attacks. Meanwhile, practical experiments show that although the attacks in this paper are efficient, our countermeasures can resist them effectively.

• International Journal of Internet, Broadcasting and Communication
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• v.12 no.1
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• pp.90-94
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• 2020

Artificial intelligence (AI) is software that learns large amounts of data and provides the desired results for certain patterns. In other words, learning a large amount of data is very important, and the role of memory in terms of computing systems is important. Massive data means wider bandwidth, and the design of the memory system that can provide it becomes even more important. Providing wide bandwidth in AI systems is also related to power consumption. AlphaGo, for example, consumes 170 kW of power using 1202 CPUs and 176 GPUs. Since more than 50% of the consumption of memory is usually used by system chips, a lot of investment is being made in memory technology for AI chips. MRAM, PRAM, ReRAM and Hybrid RAM are mainly studied. This study presents various memory technologies that are being studied in artificial intelligence chip design. Especially, MRAM and PRAM are commerciallized for the next generation memory. They have two significant advantages that are ultra low power consumption and nearly zero leakage power. This paper describes a comparative analysis of the four representative new memory technologies.

• Journal of Korea Society of Industrial Information Systems
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• v.21 no.1
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• pp.17-25
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• 2016

This paper proposes an ultra-low power design methodology for asynchronous circuits which combines with power switch structure used for reducing leakage current in the synchronous circuits. Compared to existing delay-insensitive asynchronous circuits such as static NCL and semi-static NCL, the proposed methodology provides the leakage power reduction in the NULL mode due to the high Vth of the power switches and the switching power reduction at the switching moment due to the smaller area even though it has a reasonable speed penalty. Therefore, it will become a low power design methodology required for IoT system design placing more value on power than speed. In this paper, the proposed methodology has been evaluated by a $4{\times}4$ multiplier designed using 0.11 um CMOS technology, and the simulation results have been compared to the conventional asynchronous circuits in terms of circuit delay, area, switching power and leakage power.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.6
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• pp.50-58
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• 2013

The Neutral Beam Injection(NBI) generates ultra-high temperature energy in the tokamak of nuclear fusion. The NBI consists of filament power supply acceleration and deceleration power supply and arc power supply(APS). The APS has characteristics of low voltage and high current. APS generate arc through constant output of voltage and current. So this paper proposed suitable buck converter for low voltage and high current. The case of proposed buck converter used parallel switch because it can increase capacity and decrease conduction loss. When an arc is generated, the NBI chamber occur high voltage. And it will break output capacitor of buck converter. Therefore the output capacitor was removed in the proposed converter. Thus buck converter with constant output is the most important design of the output inductor. In this paper, designed APS verified operation of system and stability through simulation and prototype.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1543-1546
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• 2002

The expandable 4 bit adder/subtracter IC was designed using the adiabatic and dynamic CMOS logic (ADCL) circuit as the ultra-low power consumption basic logic circuit and the IC was fabricated using a standard 1.2 ${\mu}$ CMOS process. As the result the steady operation of 4 bit addition and subtraction has been confirmed even if the frequency of the sinusoidal supply voltage is higher than 10MHz. Additionally, by the simulation, at the frequency of 10MHz, energy consumption per operation is obtained as 93.67pJ (ar addition and as 118.67pJ for subtraction, respectively. Each energy is about 1110 in comparison with the case in which the conventional CMOS logic circuit is used. A simple and low power oscillation circuit is also proposed as the power supply circuit f3r the ADCL circuit. The oscillator operates with a less one volt of DC supply voltage and around one milli-watts power dissipation.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.2
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• pp.36-44
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• 2016

In this paper, an Impulse Radio-Ultra Wide band RF Transceiver for WBAN applications is implemented in $0.18{\mu}m$ CMOS technology. The designed RF transceiver support 3-5GHz UWB low band and employs OOK(On-Off Keying) modulation. The receiver employs non-coherent energy detection architecture to reduce complexity and power consumption. For the rejection of the undesired interferers and improvement of the receiver sensitivity, RF active notch filter is integrated. The VCO based transmitter employs the switch mechanism. As adapt the switch mechanism, power consumption and VCO leakage can be reduced. Also, the spectrum mask is always same at each center frequency. The measured sensitivity of the receiver is -84.1 dBm at 3.5 GHz with 1.579 Mbps. The power consumption of the transmitter and receiver are 0.3nJ/bit and 41 mW respectively.

• Transactions on Electrical and Electronic Materials
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• v.13 no.2
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• pp.69-72
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• 2012

In this study, deposition of low-dielectric constant SiOC(H) films by conventional plasma-enhanced chemical vapor deposition (PECVD) were investigated through various characterization techniques. The results show that, with an increase in the plasma power density, the relative dielectric constant (k) of the deposited films decreases whereas the refractive index increases. This is mainly due to the incorporation of organic molecules with $CH_3$ group into the Si-O-Si cage structure. It is as confirmed by FT-IR measurements in which the absorption peak at 1,129 $cm^{-1}$ corresponding to Si-O-Si cage structure increases with power plasma density. Electrical characterization reveals that even after fast thermal annealing process, the leakage current density of the deposited films is in the order of $10^{-11}$ A/cm at 1.5 MV/cm. The reliability of the SiOC(H) film is also further characterized by using BTS test.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2017.06a
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• pp.143-144
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• 2017

다양한 응용 매체의 유비쿼터스(ubiquitous) 연결을 위한 사물 인터넷 (Internet-of-Thing; IoT) 시스템은 저전력 광역 통신 (Low Power Wide Area; LPWA) 기술을 기반으로 한다. 저전력 광역 통신 시스템의 충족조건인 전송 거리 확대와 낮은 전력 사용은 시스템 전력 운용 관점에서는 상호 충돌하는 조건이다. 이를 위해 신호대역폭을 줄여 수신기 감도 (receiver sensitivity) 를 개선하는 초협대역 (Ultra Narrow Band; UNB) 기술이 주목받고 있다. 여기서는 이러한 저전력 광역 통신을 위한 초협대역 변조 기술의 신호 대 잡음 비(Signal-to-Noise Ratio; SNR)에 대해 분석한다.