• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.41-41
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• 2011

Flash memory에서 tunnel oxide film은 electron tunnelling 현상을 이용하여 gate에 전하를 전달하는 통로로 사용되고 있다. 특히, tunnel oxide film 내부의 charge trap 현상과 불순물이 소자 특성에 직접적인 영향을 주고 있어, 후속 N2O/NO 열처리 공정에서 SiO2/Si 계면에 nitrogen을 주입하여 tunnel oxide film 특성을 개선하고 있다. 따라서 N2O/NO 열처리 공정 최적화를 위해서는 tunnel oxide film 내 N 농도와 분포에 대한 정확한 평가가 필수적이다[1]. 본 실험에서는 low energy magnetic SIMS를 이용하여 N2O로 열처리된 tunnel oxide film 내의 N농도를 보다 정확하게 평가하고자 하였다. 사용된 시료는 Si substrate에 oxidation 이후 N2O 열처리를 진행하여 tunnel oxide를 형성시켰으며, 분석 impact energy는 surface effect최소화와 최상의 depth resolution 확보를 위해 250eV를 사용하였으며, matrix effect와 mass interference를 방지하기 위해 MCs+ cluster mode[2]로 CsN signal를 검출하였다. 실험 결과, 특정 primary beam 입사각도에서 nitrogen depth resolution 저하 현상이 발생하였고, SIMS crater 표면이 매우 거칠게 나타났다. 이에, Depth resolution 저하 현상을 개선하기 위해 극한의 glancing 입사각 조건으로 secondary extraction voltage 변화를 통해 depth resolution이 개선되는 최적의 impact energy와 primary beam 입사각 조건을 확보하였다. 그 결과 nitrogen의 depth resolution은 1.6nm의 depth resolution을 확보하였으며, 보다 정확한 N 농도와 분포를 평가할 수 있게 되었다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.1
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• pp.32-39
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• 2008

Tunnel oxide of non-volatile memory (NVM) devices would be very difficult to downscale if ten-year data retention were still needed. This requirement limits further improvement of device performance in terms of programming speed and operating voltages. Consequently, for low-power applications with Fowler-Nordheim programming such as NAND, program and erase voltages are essentially sustained at unacceptably high levels. A promising solution for tunnel oxide scaling is tunnel barrier engineering (TBE), which uses multiple dielectric stacks to enhance field-sensitivity. This allows for shorter writing/erasing times and/or lower operating voltages than single $SiO_2$ tunnel oxide without altering the ten-year data retention constraint. In this paper, two approaches for tunnel barrier engineering are compared: the crested barrier and variable oxide thickness. Key results of TBE and its applications for NVM are also addressed.

• Korean Journal of Materials Research
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• v.19 no.9
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• pp.462-467
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• 2009

The Charge Trap Flash (CTF) memory device is a replacement candidate for the NAND Flash device. In this study, Pt/$Al_2O_3/La_2O_3/SiO_2$/Si multilayer structures with lanthanum oxide charge trap layers were fabricated for nonvolatile memory device applications. Aluminum oxide films were used as blocking oxides for low power consumption in program/erase operations and reduced charge transports through blocking oxide layers. The thicknesses of $SiO_2$ were from 30 $\AA$ to 50 $\AA$. From the C-V measurement, the largest memory window of 1.3V was obtained in the 40 $\AA$ tunnel oxide specimen, and the 50 $\AA$ tunnel oxide specimen showed the smallest memory window. In the cycling test for reliability, the 30 $\AA$ tunnel oxide sample showed an abrupt memory window reduction due to a high electric field of 9$\sim$10MV/cm through the tunnel oxide while the other samples showed less than a 10% loss of memory window for $10^4$ cycles of program/erase operation. The I-V measurement data of the capacitor structures indicated leakage current values in the order of $10^{-4}A/cm^2$ at 1V. These values are small enough to be used in nonvolatile memory devices, and the sample with tunnel oxide formed at $850^{\circ}C$ showed superior memory characteristics compared to the sample with $750^{\circ}C$ tunnel oxide due to higher concentration of trap sites at the interface region originating from the rough interface.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.10
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• pp.778-783
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• 1998

Film characteristics of thin ONO dielectric layers for MONOS(metal-oxide-nitride-oxide-semiconductor) EEPROM was investigated by TEM, AES and AFM. Seocnd derivative spectra of Auger Si LVV overlapping peak provide useful information fot chemical state analysis of superthin film. The ONO film with dimension of tunnel oxide 23$\AA$, nitride 33$\AA$, and blocking oxide 40$\AA$ was fabricated. During deposition of the LPCVD nitride film on tunnel oxide, this thin oxide was nitrized. When the blocking oxide was deposited on the nitride film, the oxygen not only oxidized the nitride surface, but diffused through the nitride. The results of ONO film analysis exhibits that it is made up of $SiO_2$ (blocking oxide)/O-rich SiON(interface)/N-rich SiON(nitride)/ O-rich SiON(tunnel oxide)

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.308-309
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• 2016

Reducing surface recombination is a critical factor for high efficiency silicon solar cells. The passivation process is for reducing dangling bonds which are carrier. Tunnel oxide layer is one of main issues to achieve a good passivation between silicon wafer and emitter layer. Many research use wet-chemical oxidation or thermally grown which the highest conversion efficiencies have been reported so far. In this study, we deposit ultra-thin tunnel oxide layer by PECVD (Plasma Enhanced Chemical Vapor Deposition) using $N_2O$ plasma. Both side deposit tunnel oxide layer in different RF-power and phosphorus doped a-Si:H layer. After deposit, samples are annealed at $850^{\circ}C$ for 1 hour in $N_2$ gas atmosphere. After annealing, samples are measured lifetime and implied Voc (iVoc) by QSSPC (Quasi-Steady-State Photo Conductance). After measure, samples are annealed at $400^{\circ}C$ for 30 minute in $Ar/H_2$ gas atmosphere and then measure again lifetime and implied VOC. The lifetime is increase after all process also implied VOC. The highest results are lifetime $762{\mu}s$, implied Voc 733 mV at RF-power 200 W. The results of C-V measurement shows that Dit is increase when RF-power increase. Using this optimized tunnel oxide layer is attributed to increase iVoc. As a consequence, the cell efficiency is increased such as tunnel mechanism based solar cell application.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.37-40
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• 1999

For the first time, charge trapping nonvolatile semiconductor memories with the deoxidized oxynitride gate dielectric is proposed and demonstrated. Gate dielectric wit thickness of less than 1 nm have been grown by postnitridation of pregrown thermal silicon oxides in NO ambient and then reoxidation. The nitrogen distribution and chemical state due to NO anneal/reoxidation were investigated by M-SIMS, TOF-SIMS, AES depth profiles. When the NO anneal oxynitride film was reoxidized on the nitride film, the nitrogen at initial oxide interface not only moved toward initial oxide interface, but also diffused through the newly formed tunnel oxide by exchange for oxygen. The results of reoxidized oxynitride(ONO) film analysis exhibits that it is made up of SiO$_2$(blocking oxide)/N-rich SiON interface/Si-rich SiON(nitrogen diffused tunnel oxide)/Si substrate. In addition, the SiON and the S1$_2$NO Phase is distributed mainly near the tunnel oxide, and SiN phase is distributed mainly at tunnel oxide/Si substrate interface.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.1
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• pp.65-73
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• 1986

Experiment have been conducted about thin oxide characteristics according to O2/N2 ratio needed for EEPROM cell fabrication. As a result, we think that there is no problem even if we grow oxide layer with large O2/N2 ratio and short exidation time and when the water is implated by As before oxidation, the oxide breakdown field is about IMV/cm lower than that is not implanted. Especially, the thin oxide characteristic seems to be affected largely by wafer cleaning and oxidation in air. On the basis of these, tunnel type EEPROM cell is fabricated by 3um CMOS process and its characteristic is studied. Tunnel oxide thickness(100\ulcorner is chosen to allow Fowler-Nordheim tunneling to charge the floating gate at the desired programming voltage and tunnel area(2x2um\ulcorneris chosen to increase capacitive coupling ratio. For program operation, high voltage (20-22V) is applied to the control gate, while both drain and source are gdrounded. The drain voltage for erase is 16V. It is shown that charge retention characteristics is not limited by leakage in the oxide and program/erase endurance is over 10E4 cycles of program erase operation.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.406-406
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• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• Current Photovoltaic Research
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• v.9 no.3
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• pp.75-83
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• 2021

The tunnel oxide passivated contact (TOPCon) structure got more consideration for development of high performance solar cells by the introduction of a tunnel oxide layer between the substrate and poly-Si is best for attaining interface passivation. The quality of passivation of the tunnel oxide layer clearly depends on the bond of SiO in the tunnel oxide layer, which is affected by the subsequent annealing and the tunnel oxide layer was formed in the suboxide region (SiO, Si₂O, Si₂O₃) at the interface with the substrate. In the suboxide region, an oxygen-rich bond is formed as a result of subsequent annealing that also improves the quality of passivation. To control the surface morphology, annealing profile, and acceleration rate, an oxide tunnel junction structure with a passivation characteristic of 700 mV or more (V_oc) on a p-type wafer could achieved. The quality of passivation of samples subjected to RTP annealing at temperatures above 900℃ declined rapidly. To improve the quality of passivation of the tunnel oxide layer, the physical properties and thermal stability of the thin layer must be considered. TOPCon silicon solar cell has a boron diffused front emitter, a tunnel-SiO_x/n⁺-poly-Si/SiN_x:H structure at the rear side, and screen-printed electrodes on both sides. The saturation currents J_o of this structure on polished surface is 1.3 fA/cm² and for textured silicon surfaces is 3.7 fA/cm² before printing the silver contacts. After printing the Ag contacts, the J_o of this structure increases to 50.7 fA/cm² on textured silicon surfaces, which is still manageably less for metal contacts. This structure was applied to TOPCon solar cells, resulting in a median efficiency of 23.91%, and a highest efficiency of 24.58%, independently. The conversion efficiency of interdigitated back-contact solar cells has reached up to 26% by enhancing the optoelectrical properties for both-sides-contacted of the cells.

• Proceedings of the Korean Magnestics Society Conference
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• 2004.12a
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• pp.137-137
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• 2004