• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.1
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• pp.58-64
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• 2013

In this paper, two new flip-flop circuits with PCRAM latches that are FF-1 and FF-2, respectively, are proposed not to waste leakage during sleep time. Unlike the FF-1 circuit that has a normal PCRAM latch, the FF-2 circuit has a selective write latch that can reduce the switching activity in writing operation to save switching power at sleep-in moment. Moreover, a sequential sleep-in control is proposed to reduce the rush current peak that is observed at the sleep-in moment. From the simulation of storing '000000' to the PCRAM latch, we could verify that the proposed FF-1 and FF-2 consume smaller power than the conventional 45-nm FF if the sleep time is longer than $465{\mu}s$ and $95{\mu}s$, respectively, at $125^{\circ}C$. For the rush current peak, the sequential sleep-in control could reduce the current peak as much as 77%.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.52 no.12
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• pp.698-704
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• 2003

Autoreclosure provides a mean of improving power transmitting ability and system stability. The conventional reclosure adopts the fixed dead time interval strategy, that is, the reclosure is activated after a time delay to restore the system to normal as quickly as possible without regard to the system conditions, however, these simple techniques cannot give the optimal operating performance. For this reason, various adaptive reclosure algorithms have been proposed recently, This paper presents an adaptive autoreclosure algorithm including the variable dead time, optimal reclosure, sequential reclosure and emergency extended equal-area criterion (EEAC) algorithm in order to improve the system stability. The reclosure algorithm performs out the operations that are attuned to the power system conditions. The proposed adaptive reclosure algorithm is verified and tested by using EMTP MODELS, and the simulation results show that the system oscillations are reduced and the transient stability is enhanced by employing the proposed adaptive reclosure algorithm.

• Journal of the Korea Society for Simulation
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• v.1 no.1
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• pp.64-76
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• 1992

The DEVS(discrete event system specificaition) formalism specifies a discrete event system in a hierarchical, modular form. DEVSIM++ is a C++based general purpose DEVS abstract simulator which can simulate systems modeled by the DEVS formalism in a sequential environment. This paper describes P-DEVSIM++which is a parallel version of DEVSIM++ . In P-DEVSIM++, the external and internal event of DEVS models can by processed in parallel. For such processing, we propose a parallel, distributed optimistic simulation algorithm based on the Time Warp approach. However, the proposed algorithm localizes the rollback of a model within itself, not possible in the standard Time Warp approach. An advantage of such localization is that the simulation time may be reduced. To evaluate its performance, we simulate a single bus multiprocessor architecture system with an external common memory. Simulation result shows that significant speedup is made possible with our algorithm in a parallel environment.

• The KIPS Transactions:PartA
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• v.9A no.4
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• pp.519-524
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• 2002

In this paper we study the qualify of sequential coverage analysis under a scenario of distributed stochastic simulation known as MRIP(Multiple Replications In Parallel) in terms of the confidence intervals of coverage and the speedup. The estimator based in the F-distribution was applied to the sequential coverage analysis of steady-state means. in simulations of the $M/M/1/{\infty},\;M/D/I/{\infty}\;and\;M/H_{2}/1/{\infty}$ queueing systems on a single processor and multiple processors. By using multiple processors under the MRIP scenario, the time for collecting many replications needed in sequential coverage analysis is reduced. One can also easily collect more replications by executing it in distributed computers or clusters linked by a local area network.

• ETRI Journal
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• v.34 no.3
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• pp.462-465
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• 2012

This letter proposes a new distributed scheduling scheme combined with routing to support the quality of service of real-time applications in wireless mesh networks. Next, this letter drives average end-to-end delay of the proposed scheduling scheme that sequentially schedules the slots on a path. Finally, this letter simulates the time division multiple access network for performance comparison. From the simulation results, when the average number of hops is 2.02, 2.66, 4.1, 4.75, and 6.3, the proposed sequential scheduling scheme reduces the average end-to-end delay by about 28%, 10%, 17%, 27%, and 30%, respectively, compared to the conventional random scheduling scheme.

• ETRI Journal
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• v.28 no.3
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• pp.301-310
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• 2006

In mobile communications, a class of variable-complexity algorithms for convolutional decoding known as sequential decoding algorithms is of interest since they have a computational time that could vary with changing channel conditions. The Fano algorithm is one well-known version of a sequential decoding algorithm. Since the decoding time of a Fano decoder follows the Pareto distribution, which is a heavy-tailed distribution parameterized by the channel signal-to-noise ratio (SNR), buffers are required to absorb the variable decoding delays of Fano decoders. Furthermore, since the decoding time drawn by a certain Pareto distribution can become unbounded, a maximum limit is often employed by a practical decoder to limit the worst-case decoding time. In this paper, we investigate the relations between buffer occupancy, decoding time, and channel conditions in a system where the Fano decoder is not allowed to run with unbounded decoding time. A timeout limit is thus imposed so that the decoding will be terminated if the decoding time reaches the limit. We use discrete-time semi-Markov models to describe such a Fano decoding system with timeout limits. Our queuing analysis provides expressions characterizing the average buffer occupancy as a function of channel conditions and timeout limits. Both numerical and simulation results are provided to validate the analytical results.

• Proceedings of the Korean Society of Soil and Groundwater Environment Conference
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• 2001.09a
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• pp.204-207
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• 2001

An optimization process for the design of groundwater remediation is developed by simultaneously considering the well location and the pumping rate. This process uses two independent models: simulation and optimization model. Groundwater flow and contaminant transport are simulated with MODFLOW and MT3D in simulation model. In optimization model, the location and pumping rate of each well are determined and evaluated by the genetic algorithm. In a homogeneous and symmetric domain, the developed model is tested using sequential pairs for pumping rate of each well, and the model gives more improved result than the model using sequential pairs. In application cases, the suggested optimal design shows that the main location of wells is on the centerline of contaminate distribution. The resulting optimal design also shows that the well with maximum pumping rate is replaced with the further one from the contaminant source along flow direction and that the optimal pumping rate declines when more cleanup time is given. But the optimal pumping rate is not linearly proportional to the cleanup time and the minimum total pumping volume does not coincide with the optimal pumping rate.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2004.11a
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• pp.1012-1015
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• 2004

There have been several kinds of attempts to actively control the deflected noise behind the noise barrier. Omoto's work in 1993 would be one of the fundamental studies, where he placed the control sources uniformly parallel to the noise barrier. Following this study, Yang pointed that the average distance between the noise source and control sources is more important than the arrangement of control sources such as a straight line or an arc type distribution. In 2004, Baek tried to show optimal arrangement of control sources while keeping the average distance between the noise source and control sources. He used simulated annealing algorithm which is one of the natural algorithms for the selections of optimal control source positions, but the searching technique was a hybrid of the simulated annealing and the sequential searching to adapt to the vast amount of searching time. This study is about the performance comparison between the pure sequential searching and the hybrid one. The simulation results show very similar performance and a pure simulated annealing searching will be more beneficial for the noise reduction performance but at the cost of computing time.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.143-145
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• 2005

In this paper, an empirical study result on pattern estimation method is devoted to reveal underlying data patterns with a relatively reduced computational cost. Presented method performs crisp type clustering with given n number of data samples by means of the sequential agglomerative hierarchical nested model (SAHN). Conventional SAHN based clustering requires large computation time in the initial step of algorithm. To deal with this concern, we modified overall process with a partial approach. In the beginning of this method, we divide given data set to several sub groups with uniform sampling and then each divided sub data group is applied to SAHN based method. The advantage of this method reduces computation time of original process and gives similar results. Proposed is applied to several test data set and simulation result with conceptual analysis is presented.

• Journal of the Korea Society for Simulation
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• v.7 no.1
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• pp.69-83
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• 1998

In this paper, we present the results of simulation by running parallel VHDL simulation on typical MPP(Massively Parallel Processor) systems such as IBM SP2 and SGI Origin 2000. Parallel simulation uses the synchronous protocol and parallel program is implemented using MPI(Message Passing Interface) based on message passing model, so that it can urn on any parallel programming environment which supports MPI, a standard communication library. And then GVT(Global Virtual Time) computation for parallel simulation is based on the global broadcasting with MPI＿Bcast(), which is a standard function in MPI and piggybacking. Our benchmark exhibits that as size of VHDL grows, the parallel simulation has a better performance compared with the sequential simulation. In addition, we also show the results of comparison between IBM SP2 and SGI Origin 2000 by applying the same application to those indirectly.