• Title/Summary/Keyword: time multiplexing (MUX)

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A Time-multiplexed 3d Display Using Steered Exit Pupils

  • Brar, Rajwinder Singh;Surman, Phil;Sexton, Ian;Hopf, Klaus
    • Journal of Information Display
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    • v.11 no.2
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    • pp.76-83
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    • 2010
  • This paper presents the multi-user autostereoscopic 3D display system constructed and operated by the authors using the time-multiplexing approach. This prototype has three main advantages over the previous versions developed by the authors: its hardware was simplified as only one optical array is used to create viewing regions in space, a lenticular multiplexing screen is not necessary as images can be produced sequentially on a fast 120Hz LCD with full resolution, and the holographic projector was replaced with a high-frame-rate digital micromirror device (DMD) projector. The whole system in this prototype consists of four major parts: a 120Hz high-frame-rate DMD projector, a 49-element optical array, a 120Hz screen assembly, and a multi-user head tracker. The display images for the left/right eyes are produced alternatively on a 120Hz direct-view LCD and are synchronized with the output of the projector, which acts as a backlight of the LCD. The novel steering optics controlled by the multiuser head tracker system directs the projector output to regions referred to as exit pupils, which are located in the viewers’eyes. The display can be developed in the "hang-on-the-wall"form.

A Construction of the Efficiency Switching Function (효율적인 스위칭함수 구성에 관한 연구)

  • Park, Chun-Myoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.05a
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    • pp.470-471
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    • 2018
  • This paper presents a design method for combinational digital logic systems using time domain based multiplexing and common multi-terminal extension decision diagrams. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.

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Multiple-Output Combinational Digital Logic Systems based on Decision Diagram (결정도에 기초한 다중출력조합디지털논리시스템)

  • Park Chun-Myoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.6
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    • pp.1288-1293
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    • 2005
  • This paper presents a design method for multiple-output combinational digital logic systems using time domain based on multiplexing(TDBM) and common multi-terminal extension decision diagrams(CMTEDD). The CMIEDDs represents extension valued multiple-output functions, while TDBM systems transmit several signals on a single lines. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams(CBDDs) and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams(CMTBDD) from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.

Constructing the Switching Function using Decision Diagram (결정다이아그램을 사용한 스위칭함수 구성)

  • Park, Chun-Myoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.687-688
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    • 2011
  • This paper presents a design method for combinational digital logic systems using time domain based multiplexing(TDBM) and common multi-terminal extension decision diagrams(CMTEDD). The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams(CBDDs) and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams(CMTBDD) from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.

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Variable Cut-off Frequency and Variable Sample Rate Small-Area Multi-Channel Digital Filter for Telemetry System (텔레메트리 시스템을 위한 가변 컷 오프 주파수 및 가변 샘플 레이트 저면적 다채널 디지털 필터 설계)

  • Kim, Ho-keun;Kim, Jong-guk;Kim, Bok-ki;Lee, Nam-sik
    • Journal of Advanced Navigation Technology
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    • v.25 no.5
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    • pp.363-369
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    • 2021
  • In this paper, We propose variable cut-off frequency and variable sample rate small-area multi-channel digital filter for telemetry system. Proposed digital filter reduced hardware area by implementing filter banks that can variably use cut-off frequency and sample rate without additional filter banks for an arbitrary cut ratio. In addition, We propose the architecture in which sample rate can variably be selected according to the number of filters that pass through the multiplexer control. By using time division multiplexing (TDM) supported by the finite impulse response (FIR) intellectual property (IP) of Quartus, the proposed digital filter can greatly reduce digital signal processing (DSP) blocks from 80 to 1 compared without TDM. Proposed digital filter calculated order and coefficients using Kaiser window function in Matlab, and implemented using very high speed integrated circuits hardware descryption language (VHDL). After applying to the telemetry system, we confirmed that the proposed digital filter was operating through the experimental results in the test environment.