• Title/Summary/Keyword: time clock

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The Study of Single Phase Source Stability consider for the DSC Cell s Operation Character (DSC Cell의 동작특성을 고려한 단상 전원의 안정화 연구)

  • Park, Sung-June;Park, Hae-Young;Jeon, Jin-An;Kim, Hee-Je
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1719-1721
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    • 2005
  • 현재 지구 환경 오염에 관한 관심이 증가하면서, 공해가 없는 자연 에너지원에 대한 연구가 많이 진행되고 있다. 그 중에서도 태양전지 분야중 염료감응형 태양전지(DSC)는 Si계 태양전지와 비교하여 낮은 제조비용등 여러 가지 이유로 최근 많은 연구가 진행되고 있다. 따라서 DSC 발전 시스템의 효율 향상이 요구된다. 본 연구에서는 태양전지 분야 중에서 독립적인 발전설비가 필요한 도서 및 산간 지역에 전력을 안정적으로 공급할 수 있는 소형발전용의 설비로 "전압 및 전류의 피드백을 통한 DSC Cell의 독립전원의 안정화"에 관해 연구하였다. DSC Cell측의 DC입력을 받아 Boost Converter로 승압 후 Full Bridge 인버터를 사용하여 단상 220V 60Hz의 상용전원으로 변환하였다. 여기서는 32Bit 마이크로프로세서인 DSP TMS320F2812의 A/D변환기능을 이용하여 Boost Converter의 스위칭과 Full Bridge 인버터의 스위칭을 제어하였다. 특히 TMS320F2812의 RTC(Real Time Clock)를 이용하여 출력전압의 안정성 향상에 주목적을 두었다. 실험결과 출력단에서는 220V 변동범위 0.2% 주파수 60Hz의 상용전원을 얻었으며, 프로그램의 개선을 통하여 출력전압의 변동범위를 감소시켜야 될 것이다.

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Rhythmic Expression of Mitogen Activated Protein Kinase Activity in Rice

  • Rao, Kudupudi Prabhakara;Vani, Gubbala;Kumar, Kundan;Sinha, Alok Krishna
    • Molecules and Cells
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    • v.28 no.5
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    • pp.417-422
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    • 2009
  • Mitogen activated protein kinase (MAPK) are known to get activated during various stress signals and transduce the message from the cell membrane to the nucleus for appropriate cellular reorganization. Though, a certain basal activity of MAPK is often observed in the control plants. Prolonged exposure of rice plants to lowered or elevated temperature exhibited a rhythm in the activation of MAPKs. We analyzed existence of a possible endogenous rhythm in the activity of MAPKs in rice plants. The plants growing at constant temperature entrained in 16/8 h day-night cycle showed diurnal rhythm in activity. When the activation of MAPK was tested under continuous conditions by shifting plants to continuous darkness for a period of 72 h, the periodic rhythm persisted and followed a circadian pattern. Analysis of the transcripts of group A, B and C members of MAPKs under above conditions by quantitative real time PCR revealed that the members of group C exhibit periodic rhythm. Our data indicates that the MAP kinase activity in rice follows rhythmic expression in a circadian manner.

Towards defining a simplified procedure for COTS system-on-chip TID testing

  • Di Mascio, Stefano;Menicucci, Alessandra;Furano, Gianluca;Szewczyk, Tomasz;Campajola, Luigi;Di Capua, Francesco;Lucaroni, Andrea;Ottavi, Marco
    • Nuclear Engineering and Technology
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    • v.50 no.8
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    • pp.1298-1305
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    • 2018
  • The use of System-on-Chip (SoC) solutions in the design of on-board data handling systems is an important step towards further miniaturization in space. However, the Total Ionizing Dose (TID) and Single Event Effects (SEE) characterization of these complex devices present new challenges that are either not fully addressed by current testing guidelines or may result in expensive, cumbersome test configurations. In this paper we report the test setups, procedures and results for TID testing of a SoC microcontroller both using standard $^{60}Co$ and low-energy protons beams. This paper specifically points out the differences in the test methodology and in the challenges between TID testing with proton beam and with the conventional gamma ray irradiation. New test setup and procedures are proposed which are capable of emulating typical mission conditions (clock, bias, software, reprogramming, etc.) while keeping the test setup as simple as possible at the same time.

Monitoring QZSS CLAS-based VRS-RTK Positioning Performance

  • Lim, Cheolsoon;Lee, Yebin;Cha, Yunho;Park, Byungwoon;Park, Sul Gee;Park, Sang Hyun
    • Journal of Positioning, Navigation, and Timing
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    • v.11 no.4
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    • pp.251-261
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    • 2022
  • The Centimeter Level Augmentation Service (CLAS) is the Precise Point Positioning (PPP) - Real Time Kinematic (RTK) correction service utilizing the Quasi-Zenith Satellite System (QZSS) L6 (1278.65 MHz) signal to broadcast the Global Navigation Satellite System (GNSS) error corrections. Compact State-Space Representation (CSSR) corrections for mitigating GNSS measurement error sources such as satellite orbit, clock, code and phase biases, tropospheric error, ionospheric error are estimated from the ground segment of QZSS CLAS using the code and carrier-phase measurements collected in the Japan's GNSS Earth Observation Network (GEONET). Since the CLAS service begun on November 1, 2018, users with dedicated receivers can perform cm-level precise positioning using CSSR corrections. In this paper, CLAS-based VRS-RTK performance evaluation was performed using Global Positioning System (GPS) observables collected from the refence station, TSK2, located in Japan. As a result of performing GPS-only RTK positioning using the open-source software CLASLIB and RTKLIB, it took about 15 minutes to resolve the carrier-phase ambiguities, and the RTK fix rate was only about 41%. Also, the Root Mean Squares (RMS) values of position errors (fixed only) are about 4cm horizontally and 7 cm vertically.

Evaluation of Single-Frequency Precise Point Positioning Performance Based on SPARTN Corrections Provided by the SAPCORDA SAPA Service

  • Kim, Yeong-Guk;Kim, Hye-In;Lee, Hae-Chang;Kim, Miso;Park, Kwan-Dong
    • Journal of Positioning, Navigation, and Timing
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    • v.10 no.2
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    • pp.75-82
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    • 2021
  • Fields of high-precision positioning applications are growing fast across the mass market worldwide. Accordingly, the industry is focusing on developing methods of applying State-Space Representation (SSR) corrections on low-cost GNSS receivers. Among SSR correction types, this paper analyzes Safe Position Augmentation for Real Time Navigation (SPARTN) messages being offered by the SAfe and Precise CORrection DAta (SAPCORDA) company and validates positioning algorithms based on them. The first part of this paper introduces the SPARTN format in detail. Then, procedures on how to apply Basic-Precision Atmosphere Correction (BPAC) and High-Precision Atmosphere Correction (HPAC) messages are described. BPAC and HPAC messages are used for correcting satellite clock errors, satellite orbit errors, satellite signal biases and also ionospheric and tropospheric delays. Accuracies of positioning algorithms utilizing SPARTN messages were validated with two types of positioning strategies: Code-PPP using GPS pseudorange measurements and PPP-RTK including carrier phase measurements. In these performance checkups, only single-frequency measurements have been used and integer ambiguities were estimated as float numbers instead of fixed integers. The result shows that, with BPAC and HPAC corrections, the horizontal accuracy is 46% and 63% higher, respectively, compared to that obtained without application of SPARTN corrections. Also, the average horizontal and vertical RMSE values with HPAC are 17 cm and 27 cm, respectively.

Extensive Reorganization of the Chloroplast Genome of Corydalis platycarpa: A Comparative Analysis of their Organization and Evolution with other Corydalis plastomes

  • Grusamy Raman;SeonJoo Park
    • Proceedings of the Plant Resources Society of Korea Conference
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    • 2023.04a
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    • pp.15-15
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    • 2023
  • The chloroplast (cp) is an autonomous plant organelle with an individual genome that codes for essential cellular functions. The architecture and gene content of the cp genome is highly conserved in angiosperms. The plastome of Corydalis belongs to the Papaveraceae family, and the genome is comprised of unusual rearrangements and gene content. Thus far, no extensive comparative studies have been carried out to understand the evolution of Corydalis chloroplast genomes. Therefore, the Corydalis platycarpa cp genome was sequenced, and wide-scale comparative studies were conducted using publicly available twenty Corydalis plastomes. Comparative analyses showed that an extensive genome rearrangement and IR expansion occurred, and these events evolved independently in the Corydalis species. In addition, the protein-coding genes accD and the ndh gene loss events occurred in the common ancestor of the Corydalis and sub-clade of the Corydalis lineage, respectively. The gene ndh lost in the Corydalis-sub clade species is distributed predominantly in the Qinghai-Tibetan plateau (QTP) region. The molecular clock analysis suggests that the divergence time of all the ndh gene lost Corydalis sub-clade species occurred in the 44.31 - 15.71 mya. These results coincide very well with the uplift of the Qinghai-Tibet Plateau in the Oligocene and Miocene periods, and maybe during this period, it probably triggered the radiation of the Corydalis species. To the best of the authors' knowledge, this is the first large-scale comparative study of Corydalis plastomes and their evolution. The present study may provide insights into the plastome architecture and the molecular evolution of Corydalis species.

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Design and Implementation for Portable Low-Power Embedded System (저전력 휴대용 임베디드 시스템 설계 및 구현)

  • Lee, Jung-Hwan;Kim, Myung-Jung
    • Journal of KIISE:Computing Practices and Letters
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    • v.13 no.7
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    • pp.454-461
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    • 2007
  • Portable embedded systems have recently become smaller in size and offer a variety of junctions for users. These systems require high performance processors to handle the many functions and also a small battery to fit inside the system. However, due to its size, the battery life has become a major issue. It is important to have both efficient power design and management for each function, while optimizing processor voltage and clock frequency in order to extend the battery life of the system. In this paper, we calculated the efficiency of power in optimizing power rail. This system has two microprocessors. One is used to play music and movie files while the other is for DMB. In order to reduce power consumption, the DMB microprocessor is turned of while music or videos are played. Lastly, DVFS is applied to the processor in the system to reduce power consumption. Experimental results of the implemented system have resulted in reduced power consumption.

Development of Chip-based Precision Motion Controller

  • Cho, Jung-Uk;Jeon, Jae-Wook
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1022-1027
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    • 2003
  • The Motion controllers provide the sophisticated performance and enhanced capabilities we can see in the movements of robotic systems. Several types of motion controllers are available, some based on the kind of overall control system in use. PLC (Programmable Logic Controller)-based motion controllers still predominate. The many peoples use MCU (Micro Controller Unit)-based board level motion controllers and will continue to in the near-term future. These motion controllers control a variety motor system like robotic systems. Generally, They consist of large and complex circuits. PLC-based motion controller consists of high performance PLC, development tool, and application specific software. It can be cause to generate several problems that are large size and space, much cabling, and additional high coasts. MCU-based motion controller consists of memories like ROM and RAM, I/O interface ports, and decoder in order to operate MCU. Additionally, it needs DPRAM to communicate with host PC, counter to get position information of motor by using encoder signal, additional circuits to control servo, and application specific software to generate a various velocity profiles. It can be causes to generate several problems that are overall system complexity, large size and space, much cabling, large power consumption and additional high costs. Also, it needs much times to calculate velocity profile because of generating by software method and don't generate various velocity profiles like arbitrary velocity profile. Therefore, It is hard to generate expected various velocity profiles. And further, to embed real-time OS (Operating System) is considered for more reliable motion control. In this paper, the structure of chip-based precision motion controller is proposed to solve above-mentioned problems of control systems. This proposed motion controller is designed with a FPGA (Field Programmable Gate Arrays) by using the VHDL (Very high speed integrated circuit Hardware Description Language) and Handel-C that is program language for deign hardware. This motion controller consists of Velocity Profile Generator (VPG) part to generate expected various velocity profiles, PCI Interface part to communicate with host PC, Feedback Counter part to get position information by using encoder signal, Clock Generator to generate expected various clock signal, Controller part to control position of motor with generated velocity profile and position information, and Data Converter part to convert and transmit compatible data to D/A converter.

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Evaluation of the Effect of Flocculator Rotation Direction in Floccualation Basin on Hydrodynamic Behavior using CFD (CFD를 이용한 플록큐레이터 회전방향에 따른 플록형성지 유동 평가)

  • Cho, Young-Man;Yoo, Soo-Jeon;Roh, Jae-Soon;Kim, taek-Jun;Kim, Chang-Won
    • Journal of Korean Society of Environmental Engineers
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    • v.31 no.5
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    • pp.364-370
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    • 2009
  • With time, the stable management of turbidity is becoming more important in the water treatment process. So optimization of flocculation is important for the improvement of the sedimentation efficiency. we evaluated the hydrodynamic behavior in the rotation direction (clock-wise, counterclock-wise) of the flocculator in the flocculation basin using Computational Fluid Dynamics (CFD). The results of the CFD simulation, in cases where flocculators rotate in a clockwise direction, a stronger flow is formed near the surface of the water where the rotating direction and current of flow correspond. The variance and standard deviation of the flux are about 8.5 and 2.9 respectively. In contrast, in the case of a counterclockwise direction, a stronger flow is formed near the bottom of the basin. The variance and standard deviation of the flux are about 5.3 and 2.3, respectively. The effluent flux is affected more by the third flocculator spin than the first and second flocculator spins. The third flocculator spinning in the counterclockwise direction is better for the uniform flow of the sedimentation basin than the third flocculator spinning in the clockwise direction

Implementation of the Digital Current Control System for an Induction Motor Using FPGA (FPGA를 이용한 유도 전동기의 디지털 전류 제어 시스템 구현)

  • Yang, Oh
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.11
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    • pp.21-30
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    • 1998
  • In this paper, a digital current control system using a FPGA(Field Programmable Gate Array) was implemented, and the system was applied to an induction motor widely used as an industrial driving machine. The FPGA designed by VHDL(VHSIC Hardware Description Language) consists of a PWM(Pulse Width Modulation) generation block, a PWM protection block, a speed measuring block, a watch dog timer block, an interrupt control block, a decoder logic block, a wait control block and digital input and output blocks respectively. Dedicated clock inputs on the FPGA were used for high-speed execution, and an up-down counter and a latch block were designed in parallel, in order that the triangle wave could be operated at 40 MHz clock. When triangle wave is compared with many registers respectively, gate delay occurs from excessive fan-outs. To reduce the delay, two triangle wave registers were implemented in parallel. Amplitude and frequency of the triangle wave, and dead time of PWM could be changed by software. This FPGA was synthesized by pASIC 2SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to digital current control system for 3-phase induction motor. The digital current control system of the 3 phase induction motor was configured using the DSP(TMS320C31-40 MHz), FPGA, A/D converter and Hall CT etc., and experimental results showed the effectiveness of the digital current control system.

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