• The Journal of Society for e-Business Studies
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• v.13 no.2
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• pp.149-163
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• 2008

In a ubiquitous sensor network (USN) with several nodes, real-time data processing is one of important factors. In order to process data appropriately, all the nodes should transmit sensor data in time and the transmission between nodes and their server should be managed very systematically. For the purpose of systematic management of transmission in a USN, this paper proposes a system for analyzing transmission time of sensor data. To implement the proposed system, an analyzing process of data transmission time, an analyzing method of clock drift, a collecting method of data send/receive times, and calculating formulas of data transmission duration are proposed. According to the proposed process and methods, this paper presents a system for monitoring and analyzing data transmission duration, and it also shows the results of a sample case.

• ETRI Journal
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• v.26 no.6
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• pp.513-519
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• 2004

This paper presents a low power 16-bit adiabatic reduced instruction set computer (RISC) microprocessor with efficient charge recovery logic (ECRL) registers. The processor consists of registers, a control block, a register file, a program counter, and an arithmetic and logical unit (ALU). Adiabatic circuits based on ECRL are designed using a $0.35{\mu}m$ CMOS technology. An adiabatic latch based on ECRL is proposed for signal interfaces for the first time, and an efficient four-phase supply clock generator is designed to provide power for the adiabatic processor. A static CMOS processor with the same architecture is designed to compare the energy consumption of adiabatic and non-adiabatic microprocessors. Simulation results show that the power consumption of the adiabatic microprocessor is about 1/3 compared to that of the static CMOS microprocessor.

• The Transactions of the Korea Information Processing Society
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• v.6 no.11
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• pp.3124-3130
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• 1999

A duplex system enhances reliability by tolerating faults through spatial redundancy. Faults can be detected by duplicating identical tasks in pairs of modules. However, this kind of systems cannot even detect the fault if it occurs coincidently due to either malfunctions of common component such as power supply and clock or due to such environmental disruption as EMI. In the paper, we propose a method to reduce those effects of coincident faults in the duplex controller computer. Specifically, a duplex system tolerates coincident faults by using a sophistication sequencing of scheduling technique with certain timing redundancy. In particular when all tasks should be completed in the sense of real-time, the suggested scheduling method works properly to minimize the probability of faulty tasks due to coincident fault without missing the timing constraints.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.4 no.2
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• pp.65-73
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• 1986

The PM language is a Compiler writing language which syntax- directly translates a high level language into a intermediate language of matrix form. The PM assembler translates the PM language into recursive subroutines which test input strings or output intermediate terms or call another subroutines. A large subset of PASCAL compiler was written in the PM language.

• Proceedings of the KSR Conference
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• 2011.10a
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• pp.737-747
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• 2011

5678SMRT has installed various sensor for operating conditions(field of electric, facilities, signal, communication equipment and track) and environment of Every Function Room for remotely detecting and monitoring. Installed sound sensor for analyzed after remotely heard the noise of every equipment at Every Function Room and temperature sensor for check the temperature condition of Every Function Room. Additional installed voltage sensor in signal equipment room for monitoring RF track-circuit's voltage condition. Installed displacement sensor at The Chungdam bridge's railway for measuring and monitoring track displacement caused by temperature change and Pan/Tilt camera at sub-station and drainage for remotely field monitoring. Installed sensor for each equipment's operating condition and failure at Every Function Room then periodic check of workforce turned to around-the-clock surveillance by sensor therefore improvement of operating equipment. SMRT is lots of prevent a failure by Immediately detect of precondition of equipment failure by analyzed the sensor data. If the occurrence of an failure, become detected Immediately so possibility correct diagnosis and order by remotely field check by installed camera and sound sensor at field.

• 한국HCI학회:학술대회논문집
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• 2006.02a
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• pp.1373-1378
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• 2006

대용량의 네트워크 인프라가 확대되고, 네트워크를 통한 DV, HD 급의 고화질 비디오 전송이 보편화 되면서, 고화질의 비디오에 몰입감, 현실감을 증진시키기 위한 스테레오 HD 비디오 전송이 가능하게 되었다. 본 논문은 IP 네트워크를 통해서 스테레오 HD 비디오 전송을 가능하게 해주는 소프트웨어 기반의 HD 비디오 전송 시스템에서 효과적으로 몰입감과 입체감을 제공하기 위해 충족되어야 하는 좌우 영상의 동기화에 필요한 요소들을 다룬다. 제안된 동기화 기법은 수신 측에서 최종적으로 동기화된 좌우 영상을 통해 스테레오 HD 비디오를 얻기 위해서 좌우 카메라로부터 영상의 획득 시, 획득된 영상의 네트워크 전송 시, 또 수신된 영상의 재생 시 좌우 영상의 동기화한다. 결과적으로 동기화 된 좌우 영상을 통하여 몰입감과 현실감을 가지는 스트레오 HD 비디오를 실시간으로 감상할 수 있다.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.98-101
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• 2002

This paper reports a parallel architecture in a HMM based speech recognition system for a low-power LSI design. The proposed architecture calculates output probability of continuous HMM (CHMM) by using concurrent and pipeline processing. They enable to reduce memory access and have high computing efficiency. The novel point is the efficient use of register arrays that reduce memory access considerably compared with any conventional method. The implemented system can achieve a real time response with lower clock in a middle size vocabulary recognition task (100-1000 words) by using this technique.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.635-638
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• 2002

Blowfish is a symmetric block cipher that can be used as a drop-in replacement fur DES or IDEA. It takes a variable-length key, from 32bit to 448bit, making it ideal for both domestic and exportable use. This paper is somewhere middle-of-the-line, where this paper made significant tradeoffs between speed, size and ease of implementation. The main focus was to make an implementation that was usable, moderately compact, and would still run at an acceptable clock speed. For the real time process of blowfish, it is required that high-speed operation and small size hardware. So, A structure of new adders constructed in this study has all advantages abstracted from other adders. As for this new adder, area cost increases by 1.06 times and operation speed increases by 1.42 times.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.695-698
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• 2005

The finite-field multiplication can be applied to the wide range of applications, such as signal processing on communication, cryptography, etc. However, an efficient algorithm and the hardware design are required since the finite-field multiplication takes much time to compute. In this paper, we propose a radix-4 systolic multiplier on $GF(2^m)$ with comparative area and performance. The algorithm of the proposed standard-basis multiplier is mathematically developed to map on low-cost systolic cell, so that the proposed systolic architecture is suitable for VLSI design. Compared to the bit-serial and digit-serial multipliers, the proposed multiplier shows relatively better performance with low cost. We design and synthesis $GF(2^{193})$ finite-field multiplier using Hynix $0.35{\mu}m$ standard cell library and the maximum clock frequency is 400MHz.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1101-1104
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• 1998

The modern multimedia applications which are video processor, video conference or video phone and so forth require real time processing. Because of a large amount of image data, those require high compression performance. In this paper, the prosposed image processing encoder was designed by using wavelet transform encoding. The proposed filter block can process imae data on the high speed because of composing individual function blocks by parallel and compute both highpass and lowpass coefficient in the same clock cycle. When image data is decomposed into multiresolution, the proposed scheme needs external memory and controller to save intermediate results and it can operate within 33MHz.