• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2018년도 춘계학술대회
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• pp.175-176
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• 2018

본 논문에서는 반도체 소자에 적용되는 극미세 박막을 낮은 온도에서 증착하기 위한 액상 전구체 공급 장치 개발 및 이의 특성 평가를 소개한다. 액상전구체 공급장치는 aerosol generator, vaporizer, vapor storage로 구성되어 있으며, 액체 상태의 전구 물질을 기화하여 박막 증착에 사용하는 장치이다. 이를 이용하여 알루미나 극미세 박막을 증착하여 그 특성을 평가하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.415-416
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• 2009

The tunnel barrier engineered charge trap flash (TBE-CTF) non-volatile memory using CRESTED tunneling barrier was fabricated by stacking thin $Si_3N_4$ and $SiO_2$ dielectric layers. Moreover, high-k based $HfO_2$ charge trap layer and $Al_2O_3$ blocking layer were used for further improvement of the NVM (non-volatile memory) performances. The programming/erasing speed, endurance and data retention of TBE-CTF memory was evaluated.

• 한국자기학회지
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• 제12권2호
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• pp.41-45
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• 2002

졸-겔법으로 제조된 La/sub 0.7/Pb/sub 0.3/MnO₃(LPM)박막의 기판 효과에 따른 저 자장 영역에서의 터널형 자기저항 효과에 대하여 연구하였다. 다결정 LPMO 박막은 SiO₂/Si(100) 기판과 그 위에 확산 방지막(diffusion barrier)으로 안정화 지르코니아(yttria-stabilized zirconia, YSZ) 중간층을 도입한 기판에 증착하였으며, 반면에 c-축 방향 성장을 갖는 박막의 경우 LaA1O₃(001) (LAO) 단결정 기판을 사용하였다. LPMO/LAO 박막에서의 rocking curve 측정 결과 full width half maximum (FWHM) 값은 0.32°값을 가짐을 알 수 있었다. 상온(300 K)에서 측정한 자기저항비(MR ratio) 값은 500 Oe리 외부자장을 인가시 LPMO/SiO₂/Si 박막의 경우 0.52%, LPMO/YSZ/SiO₂/Si 박막인 경우는 0.68% 그리고, LPMO/LAO의 경우에는 0.4%에도 미치지 못하는 값을 가졌다. 이때 MR최대값을 나타내는 peaks는 자기이력 곡선의 보자력 부근에서 나타남으로 그 두 결과가 잘 일치함을 보여 주고 있다. 이러한 저 자장 영역에서의 자기저항 값의 타이는 박막 시료의 기판 효과에 의한 grain boundary특성의 차이로부터 기인된다.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2006년도 춘계학술대회
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• pp.222-224
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• 2006

A non-vacuum process for $Cu(In,Ga)Se_2$ (CIGS) thin film solar cells from nanoparticle precursors was described in this work CIGS nanoparticle precursors was prepared by a low temperature colloidal route by reacting the starting materials $(CuI,\;InI_3,\;GaI_3\;and\;Na_2Se)$ in organic solvents, by which fine CIGS nanoparticles of about 20nm in diameter were obtained. The nanoparticle precursors were mixed with organic binder material for the rheology of the mixture to be adjusted for the doctor blade method. After depositing the mixture of CIGS with binder on Mo/glass substrate, the samples were preheated on the hot plate in air to evaporate remaining solvents ud to burn the organic binder material. Subsequently, the resultant (porous) CIGS/Mo/glass simple was selenized in a two-zone Rapid Thermal Process (RTP) furnace in order to get a solar ceil applicable dense CIGS absorber layer. Complete solar cell structure was obtained by depositing. The other layers including CdS buffer layer, ZnO window layer and Al electrodes by conventional methods. The resultant solar cell showed a conversion efficiency of 0.5%.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.31-32
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• 2007

Built-in voltage in organic light-emitting diodes was studied using modulated photocurrent technique ambient conditions. A device was made with a structure of anode/$Alq_3$/cathode to study a built-in voltage. An ITO was used as an anode, and $Li_2O$/Al was used as a cathode. From the bias voltage-dependent photocurrent, built-in voltage of the device is determined. The applied bias voltage when the magnitude of modulated photocurrent is zero corresponds to a built-in voltage. Built-in voltage in the device is generated due to a difference of work function of the anode and cathode. It was found that for 0.5nm thick $Li_2O$ layer built-in voltage is the higher than the others. It indicates that a very thin alkaline metal compound $Li_2O$ lowers an electron barrier height.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.212-212
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• 2013

We fabricate and characterize top gate Graphene transistor using aluminum oxide as a gate insulator by atomic layer deposition (ALD). It is found that due to absence of functional group and dangling bonds, ALD of metal oxide is difficult on Graphene. Here we used 4-mercaptopheneol as a functionalization layer on Graphene to facilitate uniform oxide coverage. Contact angle measurement and Atomic force microscopy were used to confirm uniform oxide coverage on Graphene. Raman spectroscopy revealed that functionalization with 4-mercaptopheneol does not induce any defect peak on Graphene. Our device shows mobility values of 4,000 $cm^2/Vs$ at room temperature which also suggest top gate stack does not significantly increase scattering. The noncovalent functionalization method is non-destructive and can be used to grow ultra-thin dielectric for future Graphene applications.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권12호
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• pp.755-760
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• 1999

Various fluoride films were investigated for a gate insulator of thin film transistor application. Conventional oxide containing materials like $SiO_2\;Ta_2O_5\; and \; Al_2O_3$ exhibited high interface states which lead to an increased threshold voltage and poor stability of TFT. In this paper, we investigated gate insulators using a binary matrix system of fluoride such as $CaF_2,\; SrF_2\; MgF_2,\; and\; BaF_2$. These materials exhibited an improvement in lattice mismatch, interface state and electrical stability. MIM and MIS devices were employed for an electrical characterization and structural property examination. Among the various fluoride materials, $CaF_2$ film showed an excellent lattice mismatch of 5%, breakdown electric field higher than 1.2MV/cm and leakage current density of $10^{-7}A/cm^2$. MIS diode having $Ca_2$ film as an insulation layer exhibited the interface states as low as $1.58\times10^{11}cm^{-2}eV^{-1}$. This paper probes a possibility of new gate insulator materials for TFT applications.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.160-160
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• 2015

InGaZnO (IGZO) thin-film transistors (TFTs) are very promising due to their potential use in high performance display backplane [1]. However, the stability of IGZO TFTs under the various stresses has been issued for the practical IGZO applications [2]. Up to now, many researchers have studied to understand the sub-gap density of states (DOS) as the root cause of instability [3]. Nomura et al. reported that these deep defects are located in the surface layer of the IGZO channel [4]. Also, Kim et al. reported that the interfacial traps can be affected by different RF-power during RF magnetron sputtering process [5]. It is well known that these trap states can influence on the performances and stabilities of IGZO TFTs. Nevertheless, it has not been reported how these defect states are created during conventional RF magnetron sputtering. In general, during conventional RF magnetron sputtering process, negative oxygen ions (NOI) can be generated by electron attachment in oxygen atom near target surface and accelerated up to few hundreds eV by self-bias of RF magnetron sputter; the high energy bombardment of NOIs generates bulk defects in oxide thin films [6-10] and can change the defect states of IGZO thin film. In this study, we have confirmed that the NOIs accelerated by the self-bias were one of the dominant causes of instability in IGZO TFTs when the channel layer was deposited by conventional RF magnetron sputtering system. Finally, we will introduce our novel technology named as Magnetic Field Shielded Sputtering (MFSS) process [9-10] to eliminate the NOI bombardment effects and present how much to be improved the instability of IGZO TFTs by this new deposition method.

• The Korean Journal of Ceramics
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• 제3권2호
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• pp.105-109
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• 1997

The effects of surface conditions of the C-2 cemented carbide substrate on the adhesion of diamond film were investigated. The substrates were pretreated for different times with Murakami's reagent and then the acid solution of an H2SO4-H2O2. The adhesion strength was estimated by a peeling area around the Rockwell-A indentation. The cutting performance of the diamond-coated tools was evaluated by measuring flank wears in dry turning of Al-17% Si alloy. The morphology of deposited diamond crystallites was dominated by (111) and (220) surfaces with a cubooctahedral shape. The diamond film quality was hardly affected by the surface conditions of the substrate. The variation of tool life with longer substrate etching times resulted from a compromies between the increase of film adhesion at the interface and the decrease of toughness at the substrate surface. The coated tools were mainly deteriorated by chipping and flaking of the diamond film form a lock of adhesion strength, differently from the wear phenomena of PCD tools.

• 한국응용과학기술학회지
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• 제27권1호
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• pp.50-55
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• 2010

본 논문은 메탈 이중층 전극을 이용한 유기 박막 트랜지스터를 제작하여 Au나 Ag 금속만으로 제작한 일반적인 유기 박막 트랜지스터와의 전기적 특성을 비교하였다. 전기적 특성에서 게이트 절연층은 높은 K 값을 갖는 $Al_2O_3$를 사용하였고, 유기 반도체층은 펜타센을 사용하였다. 본 실험에서 제작한 유기 박막 트랜지스터는 $1.6 \;{\times}\;10^{-1}\;cm^2$의 포화영역 이동도를 얻을 수 있었으며, 또한 드레인 전압을 -5V로 하고, 게이트 전압을 3 V에서 -10 V 까지 인가하였을 때 $3{\times}10^5$의 전멸 비를 얻을 수 있었다.