• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.406-406
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• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• Journal of the Korean Vacuum Society
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• v.14 no.2
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• pp.91-96
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• 2005

The silicon-on-insulator (SOI) wafer fabrication technique has been developed by using ion-cut process, based on proton implantation and wafer bonding techniques. It has been shown by SRIM simulation that 65keV proton implantation is required for a SOI wafer (200nm SOI, 400nm BOX) fabrication. In order to investigate the optimum proton dose and primary annealing condition for wafer splitting, the surface morphologic change has been observed such as blistering and flaking. As a result, effective dose is found to be in the $6\~9\times10^{16}\;H^+/cm^2$ range, and the annealing at $550^{\circ}C$ for 30 minutes is expected to be optimum for wafer splitting. Direct wafer bonding is performed by joining two wafers together after creating hydrophilic surfaces by a modified RCA cleaning, and IR inspection is followed to ensure a void free bonding. The wafer splitting was accomplished by annealing at the predetermined optimum condition, and high temperature annealing was then performed at $1,100^{\circ}C$ for 60 minutes to stabilize the bonding interface. TEM observation revealed no detectable defect at the SOI structure, and the interface trap charge density at the upper interface of the BOX was measured to be low enough to keep 'thermal' quality.

• Journal of Korean Society of Occupational and Environmental Hygiene
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• v.24 no.2
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• pp.122-129
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• 2014

Objectives: Because of its properties such as resistance to heat, chemicals and corrosion; tensile strength; sound absorption; and affordable price, asbestos has been widely used as a building material, fire resistant and retardant, thermal and heat insulator, soundproofing material, and electrical insulation. Since the prolonged inhalation of asbestos can cause serious illnesses such as lung cancer, mesothelioma, and asbestosis after an incubation period of 20 to 40 years, the mineral was classified as a Group 1 carcinogen by the International Agency for Research on Cancer, an intergovernmental agency forming part of the World Health Organization. Children and infants are more at risk than are adults if they are exposed to carcinogens, due to aweaker immunity that has not yet been fully developed. Most childcare centers are operated all day and children tend to spend a great amount of time in the centers. This is why it is important for them to be systematically isolated from environments that may expose them to asbestos. Materials: In order to understand both indoor and outdoor hazards to which children may have been exposed, the study focused on actual surveys of asbestos used in childcare centers, paying special attention to slate-roofed buildings in the vicinity of the centers. Results: A survey of a total of 211 childcare centers showed that the buildings of 18.1% of the centers contained asbestos, with 60.53% of the material being found in classroom ceilings. "Tex" was the most used material for ceilings, making up 89.47% of all ceilings. An outdoor survey showed that childcare centers in Daegu Metropolitan City had an average of 143 slate-roof buildings within a distance of 1km. Conclusions: Buildings housing mainly toddlers, children, teenagers and others more vulnerable to the toxicity of asbestos are not subject to asbestos investigation by law. A legal and practical basis for asbestos control is required for such buildings. In particular, housing materials which contain asbestos in day care centers require asbestos control. GIS should be used to identify the location of buildings with slate roofing materials in the vicinity of daycare centers in order to gauge toxicity of exposure to asbestos caused by potential asbestos friability possibility in outdoor conditions.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.02a
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• pp.77-77
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• 1998

Present silicon dioxide (SiOz) 떠m as intennetal dielectridIMD) layers will result in high parasitic c capacitance and crosstalk interference in 비gh density devices. Low dielectric materials such as f f1uorina뼈 silicon oxide(SiOF) and f1uoropolymer IMD layers have been tried to s이ve this problem. I In the SiOF ftlm, as fluorine concentration increases the dielectric constant of t뼈 film decreases but i it becomes unstable and wa않r absorptivity increases. The dielectric constant above 3.0 is obtain어 i in these ftlms. Fluoropolymers such as polyte$\sigma$따luoroethylene(PTFE) are known as low dielectric c constant (>2.0) materials. However, their $\alpha$)Or thermal stability and low adhesive fa$\pi$e have h hindered 야1리ru뚱 as IMD ma따"ials. 1 The concept of a plasma processing a찌Jaratus with 비gh density plasma at low pressure has r received much attention for deposition because films made in these plasma reactors have many a advantages such as go여 film quality and gap filling profile. High ion flux with low ion energy in m the high density plasma make the low contamination and go어 $\sigma$'Oss피lked ftlm. Especially the h helicon plasma reactor have attractive features for ftlm deposition 야~au똥 of i앙 high density plasma p production compared with other conventional type plasma soun:es. I In this pa야Jr, we present the results on the low dielectric constant fluorocarbonated-SiOF film d밑JOsited on p-Si(loo) 5 inch silicon substrates with 00% of 0dFTES gas mixture and 20% of Ar g gas in a helicon plasma reactor. High density 띠asma is generated in the conventional helicon p plasma soun:e with Nagoya type ill antenna, 5-15 MHz and 1 kW RF power, 700 Gauss of m magnetic field, and 1.5 mTorr of pressure. The electron density and temperature of the 0dFTES d discharge are measUI벼 by Langmuir probe. The relative density of radicals are measured by optic허 e emission spe따'Oscopy(OES). Chemical bonding structure 3I피 atomic concentration 따'C characterized u using fourier transform infrared(FTIR) s야3띠"Oscopy and X -ray photonelectron spl:’따'Oscopy (XPS). D Dielectric constant is measured using a metal insulator semiconductor (MIS;AVO.4 $\mu$ m thick f fIlmlp-SD s$\sigma$ucture. A chemical stoichiome$\sigma$y of 야Ie fluorocarbina$textsc{k}$영-SiOF film 따~si야영 at room temperature, which t the flow rate of Oz and FTES gas is Isccm and 6sccm, res야~tvely, is form려 야Ie SiouFo.36Co.14. A d dielec$\sigma$ic constant of this fIlm is 2.8, but the s$\alpha$'!Cimen at annealed 5OOt: is obtain려 3.24, and the s stepcoverage in the 0.4 $\mu$ m and 0.5 $\mu$ m pattern 킹'C above 92% and 91% without void, res야~tively. res야~tively.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.140-140
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• 2018

The 3D interconnect technologies have been appeared, as the density of Integrated Circuit (IC) devices increases. Through Silicon Via (TSV) process is an important technology in the 3D interconnect technologies. And the process is used to form a vertically electrical connection through silicon dies. This TSV process has some advantages that short length of interconnection, high interconnection density, low electrical resistance, and low power consumption. Because of these advantages, TSVs could improve the device performance higher. The fabrication process of TSV has several steps such as TSV etching, insulator deposition, seed layer deposition, metallization, planarization, and assembly. Among them, TSV metallization (i.e. TSV filling) was core process in the fabrication process of TSV because TSV metallization determines the performance and reliability of the TSV interconnect. TSVs were commonly filled with metals by using the simple electrochemical deposition method. However, since the aspect ratio of TSVs was become a higher, it was easy to occur voids and copper filling of TSVs became more difficult. Using some additives like an accelerator, suppressor and leveler for the void-free filling of TSVs, deposition rate of bottom could be fast whereas deposition of side walls could be inhibited. The suppressor was adsorbed surface of via easily because of its higher molecular weight than the accelerator. However, for high aspect ratio TSV fillers, the growth of the top of via can be accelerated because the suppressor is replaced by an accelerator. The substitution of the accelerator and the suppressor caused the side wall growth and defect generation. The suppressor was used as Single additive electrodeposition of TSV to overcome the constraints. At the electrochemical deposition of high aspect ratio of TSVs, the suppressor as single additive could effectively suppress the growth of the top surface and the void-free bottom-up filling became possible. Generally, copper was used to fill TSVs since its low resistivity could reduce the RC delay of the interconnection. However, because of the large Coefficients of Thermal Expansion (CTE) mismatch between silicon and copper, stress was induced to the silicon around the TSVs at the annealing process. The Keep Out Zone (KOZ), the stressed area in the silicon, could affect carrier mobility and could cause degradation of the device performance. Cobalt can be used as an alternative material because the CTE of cobalt was lower than that of copper. Therefore, using cobalt could reduce KOZ and improve device performance. In this study, high-aspect ratio TSVs were filled with cobalt using the electrochemical deposition. And the filling performance was enhanced by using the suppressor as single additive. Electrochemical analysis explains the effect of suppressor in the cobalt filling bath and the effect of filling behavior at condition such as current type was investigated.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.6
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• pp.80-85
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• 2019

Vanadium dioxide is a well-known metal-insulator phase transition material. Lots of researches of vanadium redox flow batteries have been researched as large scale energy storage system. In this study, vanadium oxide($VO_x$) thin films were applied to cathode for lithium ion battery. The $VO_x$ thin films were deposited on Si substrate($SiO_2$ layer of 300 nm thickness was formed on Si wafer via thermal oxidation process), quartz substrate by RF magnetron sputter system for 60 minutes at $500^{\circ}C$ with different RF powers. The surface morphology of as-deposited $VO_x$ thin films was characterized by field-emission scanning electron microscopy. The crystallographic property was confirmed by Raman spectroscopy. The optical properties were characterized by UV-visible spectrophotometer. The coin cell lithium-ion battery of CR2032 was fabricated with cathode material of $VO_x$ thin films on Cu foil. Electrochemical property of the coin cell was investigated by electrochemical analyzer. As the results, as increased of RF power, grain size of as-deposited $VO_x$ thin films was increased. As-deposited thin films exhibit $VO_2$ phase with RF power of 200 W above. The transmittance of as-deposited $VO_x$ films exhibits different values for different crystalline phase. The cyclic performance of $VO_x$ films exhibits higher values for large surface area and mixed crystalline phase.