• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.480.1-480.1
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• 2014

In this study, we suggest the new emitter formation applied solid phase epitaxy (SPE) growth process using rapid thermal process (RTP). Preferentially, we describe the SPE growth of intrinsic a-Si thin film through RTP heat treatment by radio-frequency plasma-enhanced chemical vapor deposition (RF-PECVD). Phase transition of intrinsic a-Si thin films were taken place under $600^{\circ}C$ for 5 min annealing condition measured by spectroscopic ellipsometer (SE) applied to effective medium approximation (EMA). We confirmed the SPE growth using high resolution transmission electron microscope (HR-TEM) analysis. Similarly, phase transition of P doped a-Si thin films were arisen $700^{\circ}C$ for 1 min, however, crystallinity is lower than intrinsic a-Si thin films. It is referable to the interference of the dopant. Based on this, we fabricated 16.7% solar cell to apply emitter layer formed SPE growth of P doped a-Si thin films using RTP. We considered that is a relative short process time compare to make the phosphorus emitter such as diffusion using furnace. Also, it is causing process simplification that can be omitted phosphorus silicate glass (PSG) removal and edge isolation process.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.681-684
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• 2002

To investigate thermal effects of silicon field emitter, we fabricated and characterized single silicon tips with various tip radii, which generate different joule heating. Through I-V and stability tests, the changes of emission characteristics and tip structures due to different tip heating were observed and discussed. From the results, we confirmed that the changes of emission characteristics due to thermal effects in silicon emitter could occur at relatively small emission currents and concluded that the thermal effects should be also considered under normal operation condition above 1 ${\mu}A$.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2011년도 춘계학술대회 초록집
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• pp.122.1-122.1
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• 2011

Phosphorus is known to pile-up at the silicon surface when it is thermally oxidized. A thin layer, about 40nm thick from the silicon surface, is created containing more phosphorus than the bulk of the emitter. This layer has a gaussian profile with the peak at the surface of the silicon. In this study the pile-up effect was studied if this layer can act as a front surface field for solar cells. The effect was also tested if its high dose of phosphorus at the silicon surface can lower the contact resistance with the front metal contact. P-type wafers were first doped with phosphorus to create an n-type emitter. The doping was done using either a furnace or ion implantation. The wafers were then oxidized using dry thermal oxidation. The effect of the pile-up as a front surface field was checked by measuring the minority carrier lifetime using a QSSPC. The contact resistance of the wafers were also measured to see if the pile-up effect can lower the series resistance.

• 한국전기전자재료학회논문지
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• 제17권2호
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• pp.212-216
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• 2004

In this paper, we have fabricated a triode field emitter using carbon nanotubes (CNTs) directly grown by thermal chemical vapor deposition(CVD) method as an electron omission source. Vertically aligned CNTs have been grown in the center of the gate hole, to the size of 1.5 ${\mu}{\textrm}{m}$ in diameter, with help of a sacrificial layer of a type generally used in metal tip process. By the method of tilling the substrate, we made CNTs emitters both with and without SiO$_2$layer, a sidewall protector, deposited on sidewall of gate. After that we researched the electrical characteristics about two types of emitters. In effect, a sidewall protector can enhance the electrical characteristics by suppressing the problem of short circuits between the gate and the CNTs. The leakage current of an emitter with a sidewall protector is approximately sevenfold lower than that of an emitter without it at a gate voltage of 100 V.

• IEIE Transactions on Smart Processing and Computing
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• 제4권5호
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• pp.318-323
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• 2015

We present a new way to create a thermally stable, highly strained germanium (Ge) optical resonator using a novel Ge-on-dual-insulators substrate. Instead of using a conventional way to undercut the oxide layer of a Ge-on-single-insulator substrate for inducing tensile strain in germanium, we use thin aluminum oxide as a sacrificial layer. By eliminating the air gap underneath the active germanium layer, we achieve an optically insulating, thermally conductive, and highly strained Ge resonator structure that is critical for a practical germanium laser. Using Raman spectroscopy and photoluminescence experiments, we prove that the novel geometry of our Ge resonator structure provides a significant improvement in thermal stability while maintaining good optical confinement.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2011년도 제42회 하계학술대회
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• pp.1410-1411
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• 2011

Tip-type carbon nanotube(CNT) based electron emitters were fabricated by forming a hafnium(Hf) interlayer between the CNT and the substrate. The CNTs were deposited by using the electrophoretic deposition method and thermally treated. No significant change in the microscopic structure of the CNTs, such as the ratio of length to diameter, was observed after the deposition of Hf interlayer and thermal treatment. As compared with the CNT emitter without the Hf-interlayer and thermal treatment, the CNT emitter with the Hf-interlayer and thermal treatment showed noticeably improved electron-emission properties due to the enhanced adhesion.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.150-150
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• 2010

Carbon nanotubes have drawn attention as one of the most promising emitter materials ever known not only due to their nanometer-scale radius of curvature at tip and extremely high aspect ratios but also due to their strong mechanical strength, excellent thermal conductivity, good chemical stability, etc. Some applications of CNTs as emitters, such as X-ray tubes and microwave amplifiers, require high current emission over a small emitter area. The field emission for high current density often damages CNT emitters by Joule heating, field evaporation, or electrostatic interaction. In order to endure the high current density emission, CNT emitters should be optimally fabricated in terms of material properties and morphological aspects: highly crystalline CNT materials, low gas emission during electron emission in vacuum, optimal emitter distribution density, optimal aspect ratio of emitters, uniform emitter height, strong emitter adhesion onto a substrate, etc. We attempted a novel approach to fabricate CNT emitters to meet some of requirements described above, including highly crystalline CNT materials, low gas emission, and strong emitter adhesion. In this study, CNT emitters were fabricated by filtrating an aqueous suspension of highly crystalline thin multiwalled CNTs (Hanwha Nanotech Inc.) through a metal mesh. The metal mesh served as a support and fixture frame of CNT emitters. When 5 ml of the CNT suspension was engaged in filtration through a 400 mesh, the CNT layers were formed to be as thick as the mesh at the mesh openings. The CNT emitter sample of $1{\times}1\;cm^2$ in size was characteristic of the turn-on electrical field of 2.7 V/${\mu}m$ and the current density of 14.5 mA at 5.8 V/${\mu}m$ without noticeable deterioration of emitters. This study seems to provide a novel fabrication route to simply produce small-size CNT emitters for high current emission with reliability.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 춘계학술대회 논문집 디스플레이 광소자분야
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• pp.90-93
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• 2004

In this work, we have used different techniques for the surface passivation: conventional thermal oxidation (CTO), rapid thermal oxidation (RTO), and plasma-enhanced chemical vapour deposition (PECVD). The surface passivation qualities of eight different single and combined double layer have been investigated both on the phosphorus non-diffused p-type FZ silicon and on phosphorus diffused emitter of 100 ${\Omega}/Sq$ and 40 ${\Omega}/Sq$. In the single layer, silicon dioxide $(SiO_2)$ passivates good on the emitter while silicon nitride (SiN) passivates better than on the non-diffused surface. In the double layers, CTO/SiN1 passivates very well both on non-diffused surface on the emitter. However, RTO/SiN1 and RTO/SiN2 stacks are more suitable for surface passivation in solar cells caused by a relatively good passivation qualities and the low optical reflection. Applying these stacks in solar cells we achieved 18.5 % and 18.8 % on 0.5 ${\Omega}$ cm FZ-Si with planar and textured front surface, respectively. The excellent open circuit voltage $(V_{oc})$ of 675.6 mV is obtained the planar cell with RTO/SiN stack.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제50권8호
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• pp.409-413
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• 2001

In the electron-gun of CRT, the Mo-tip FEA was employed as cold cathode in order to replace the conventional thermal cathode. The Mo-tip FEA was designed and fabricated according to CRT specification and mounted on the electron-gun. It was known that fabricated cold cathode electron-gun showed better performance in terms of maximum emission current and switch-on time when compared with the ones of thermal cathode electron-gun, but some geometrical structures in the inside of electron-gun must be changed to reduce the gate leakage current. Finally, the potential applicability was guaranteed by means of operating the 19 inch-sized LG-color CRT using the fabricated cold cathode electron-gun.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.213-216
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• 2001

The use of a thin film of indium between the ITO and the $n^{+}$-InP contact layers for InP/InGaAs HPTs was studied without degrading its excellent optical transmittance properties. ITO/$n^{+}$-InP ohmic contact was successfully achieved by the deposition of Indium and thermal annealing. The specific contact resistance of about 6.6$\times$$10^{-4}$$\Omega\textrm{cm}^2$ was measured by use of the transmission line method (TLM). However, as the thermal annealing was just performed to ITO/$n^{+}$-InP contact without the deposition of Indium between ITO and $n^{+}$-InP, it exhibited schottky characteristics. In the applications, the DC characteristics of InP/InGaAs HPTs with ITO emitter contacts was compared with that of InP/InGaAs HBTs with the opaque emitter contacts.