• 제목/요약/키워드: the neutral point current

검색결과 124건 처리시간 0.021초

인터리빙 동작을 위한 하단 인덕터를 갖는 3-Level Boost Converter (3-Level Boost Converter Having Lower Inductor for Interleaving Operation)

  • 이강문;백승우;김학원;조관열;강정원
    • 전력전자학회논문지
    • /
    • 제26권2호
    • /
    • pp.96-105
    • /
    • 2021
  • Large-scale power converters consist of series or parallel module combinations. In these modular converter systems, the interleaving technique can be applied to improve capacitor reliability by reducing the ripple of the I/O current in which each module operates as a phase difference. However, when applying the interleaving technique for conventional three-level boost converters, the short-circuit period of the converter can be an obstacle. Such problem is caused by the absence of a low-level inductor of the conventional three-level boost converter. To solve this problem, a three-level boost converter with a low-level inductor is proposed and analyzed to enable interleaved operation. In the proposed circuit, the current ripple of the output capacitor depends on the neutral point connections between the modules. In this study, the ripple current is analyzed by the neutral point connections of the three-level boost converter that has a low-level inductor, and the effectiveness of the proposed circuit is proven by simulation and experiment.

3-레벨 인버터 공간벡터 변조시의 중성점 전위 변동 보상법 (Compensating for the Neutral-Point Potential Variation in Three-Level Space-Vector PWM Method)

  • 서재형;김광섭;방상석;최창호
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2001년도 전력전자학술대회 논문집
    • /
    • pp.475-478
    • /
    • 2001
  • In performing the three-level SVPWM, it is nearly impossible to control the neutral-point potential exactly to the half of the dc-link voltage at all times. Therefore the inverter would produce an erroneous output voltage by this voltage unbalance. So the voltage unbalance has to be compensated in doing PWM, when the voltage unbalance occurs whether it is small or large, to make the inverter output voltage follow the reference voltage exactly the same. In this paper, a new compensating method for the neutral-point potential variation in a three-level inverter space vector PWM (SVPWM) is presented. By using the proposed method, the output voltage of the inverter can be made same as the reference voltage and thus the current and torque ripple of the inverter driven motor can be greatly improved even if the voltage unbalance is quite large. The proposed method is verified experimentally with a 3-level IGBT inverter.

  • PDF

소용량 직류단 커패시터를 가지는 3-레벨 NPC 인버터의 입-출력 전류 품질 향상을 위한 제어 기법 (A Control Scheme for Quality Improvement of Input-Output Current of Small DC-Link Capacitor Based Three-Level NPC Inverters)

  • 인효철;김석민;박성수;이교범
    • 전력전자학회논문지
    • /
    • 제22권4호
    • /
    • pp.369-372
    • /
    • 2017
  • This paper presents a control scheme for three-level NPC inverters using small DC-link capacitors. To reduce the inverter system volume, the film capacitor with small capacitance is a promising candidate for the DC-link. When small capacitors are applied in a three level inverter, however, the AC ripple component increases in the DC-link NPV (neutral point voltage). In addition, the three-phase input grid currents are distorted when the DC-link capacitors are fed by diode rectifier. In this paper, the additional circuit is applied to compensate for small capacitor systems defect, and the offset voltage injection method is presented for the stabilization in NPV. These two proposed processes evidently ensure the quality improvement of the input grid currents and output load currents. The feasibility of the proposed method is verified by experimental results.

Fe와 galvanic couple된 알루미늄의 내식성에 미치는 마그네슘의 영향 (Effects of Mg on corrosion resistance of Al galvanically coupled to Fe)

  • 현영민;김희산
    • Corrosion Science and Technology
    • /
    • 제12권1호
    • /
    • pp.40-49
    • /
    • 2013
  • Effects of magnesium and pH on corrosion of aluminum galvanically coupled to iron have studied by using potentio- dynamic and static tests for polarization curves, Mott-Schottky test for analysis of semiconductor property, and GD-AES and XPS for film analysis. Pitting potential was sensitive to magnesium as an alloying element but not to pH, while passive current was sensitive to pH but not to magnesium. It was explained with, instead of point defect model (PDM), surface charge model describing that the ingression of chloride depends on the state of surface charge and passive film at film/solution interface is affected by pH. In addition, galvanic current of aluminum electrically coupled to iron was not affected by magnesium in pH 8.4, 0.2M citrate solution but was increased by magnesium at the solution of pH 9.1. The galvanic current at pH 9.1 increased with time at the initial stage and after the exposure of about 200 minute, decreased and stabilized. The behavior of the galvanic current was related with the concentration of magnesium at the surface. It agreed with the depletion of magnesium at the oxide surface by using glow discharge atomic emission spectroscopy (GD-AES). In addition, pitting potential of pure aluminum was reduced in neutral pH solution where chloride ion maybe are competitively adsorbed on pure aluminum. It was confirmed by the exponential decrease of pitting potential with log of [$Cl^-$] around 0.025 M of [$Cl^-$] and linear decrease of the pitting potential. From the above results, unlike magnesium, alloying elements with higher electron negativity, lowering isoelectric point (ISE), are recommended to be added to improve pitting corrosion resistance of aluminum and its alloys in neutral solutions as well as their galvanic corrosion resistance in weakly basic solutions.

전차선 전류 분류비를 이용한 교류전기철도 고장점 표정기법에 관한 연구 (A Study on Fault Location Estimation Technique Using the distribution Ratio of Catenary Current in AC Feeding System)

  • 정호성;박영;김형철;민명환;신명철
    • 한국철도학회논문집
    • /
    • 제14권5호
    • /
    • pp.404-410
    • /
    • 2011
  • AT 방식의 교류 급전시스템에서는 고장점 표정하기 위해 리액턴스 방식과 AT흡상전류비 방식을 채택하고 있다. 하지만 이 방식들은 여러 이유로 인해 표정 오차가 발생할 수 있다. 기존 방식의 이러한 단점을 해결하기 위해 전차선 전류 분류비를 이용하여 고장점을 표정하는 새로운 기법을 제안한다. 전차선 전류 분류비 방식은 기존에 전차선에 연결되어 있는 보호계전기를 사용하여 각 전차선의 전류를 측정하고 취합하여, 그 비(ratio)를 이용하여 고장지점을 표정한다. 이 방식은 기존의 기법보다 더 정확한 고장점을 표정할 수 있으며, 기존의 설치되어있는 계전기를 사용함으로써 추가 설비의 비용을 절감할 수 있다.

Soft-Switching T-Type Multilevel Inverter

  • Chen, Tianyu;Narimani, Mehdi
    • Journal of Power Electronics
    • /
    • 제19권5호
    • /
    • pp.1182-1192
    • /
    • 2019
  • In order to improve the conversion efficiency and mitigate the EMI problem of conventional hard-switching inverters, a new soft-switching DC-AC inverter with a compact structure and a low modulation complexity is proposed in this paper. In the proposed structure, resonant inductors are connected in series for the arm branches, and resonant capacitors are connected in parallel for the neutral point branches. With the help of resonant components, the proposed structure achieves zero-current switching on the arm branches and zero-voltage switching on the neutral point branches. When compared with state-of-art soft-switching topologies, the proposed topology does not need auxiliary switches. Moreover, the commutation algorithm to realize soft-switching can be easily implemented. In this paper, the principle of the resonant operation of the proposed soft-switching converter is presented and its performance is verified through simulation studies. The feasibility of the proposed inverter is evaluated experimentally with a 2.4-kW prototype.

FPGA Implementation of Diode Clamped Multilevel Inverter for Speed Control of Induction Motor

  • Kuppuswamy, C.L.;Raghavendiran, T.A.
    • Journal of Electrical Engineering and Technology
    • /
    • 제13권1호
    • /
    • pp.362-371
    • /
    • 2018
  • This work proposes FPGA implementation of Carrier Disposition PWM for closed loop seven level diode clamped multilevel inverter in speed control of induction motor. VLSI architecture for carrier Disposition have been introduced through which PWM signals are fed to the neutral point seven level diode clamped multilevel using which the speed of the induction motor is controlled. This proposed VLSI architecture makes the power circuit to work better with reduced stresses across the switches and a very low voltage and current total harmonic distortion (THD). The output voltages, currents, torque & speed characteristics for seven level neutral point diode clamped multilevel inverter for AC drive was studied. It has observed the proposed scheme introduces less distortion and harmonics. The results were validated using real time results.

3-Level NPC 토폴로지의 무효전류 품질 향상을 위한 DC-Link 중성점 리플전압 예측 기법 (Estimating the DC Link Neutral Point Voltage to Improve Quality of Reactive Current for the 3-Level NPC topology)

  • 이윤민;도원석;서정원;정문권;김희중;김영근
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2019년도 전력전자학술대회
    • /
    • pp.324-325
    • /
    • 2019
  • 본 논문에서는 3-Level Neutral-Point-Clamped (NPC) 인버터의 중성점 리플 전압 예측 기법을 제안한다. 산업용 계통 연계형 인버터의 경우, 계통 규정을 만족하기 위하여 전압 강하와 같은 계통 사고 발생 시 계통에 협조할 수 있도록 무효전류 보상이 요구된다. NPC 인버터는 두 개의 커패시터가 직렬로 이루어진 구조로 무효전류 출력 시 상단과 하단의 커패시터 전압에 3차 중성점 리플 전류로 인해 중성점 리플 전압이 발생한다. 따라서 중성점 리플 전압을 고려하여 출력 전류에 보상하지 않으면 무효전류의 품질에 악영향을 끼칠 수 있다. 본 논문에서는 하나의 DC 전압센서를 통하여 중성점 전류를 예측하고, 중성점 리플 전압을 보상하는 알고리즘을 제안한다. Hardware In the Loop (HIL) Simulation을 통하여 본 논문에서 제안한 알고리즘의 타당성을 검증한다.

  • PDF

Three-Level NPC-Based Dual Active Bridge Converter의 도통손실 절감을 위한 새로운 스위칭 방법 (A Control Method to Improve Power Conversion Efficiency of Three-level NPC-Based Dual Active Bridge Converter)

  • 이준영;최현준;김주용;정지훈
    • 전력전자학회논문지
    • /
    • 제22권2호
    • /
    • pp.150-158
    • /
    • 2017
  • This study proposes a new pulse-width modulation switching pattern for the low conduction loss of a three-level neutral point clamped (NPC)-based dual-active bridge (DAB) converter. The operational principle for a bidirectional power conversion is a phase-shift modulation. The conventional switching method of the three-level NPC-based DAB converter shows a symmetric switching pattern. This method has a disadvantage of high root-mean-square (RMS) value of the coupling inductor current, which leads to high conduction loss. The proposed switching method shows an asymmetrical pattern, which can reduce the RMS value of the inductor current with lower conduction loss than that of the conventional method. The performance of the proposed asymmetrical switching method is theoretically analyzed and practically verified using simulation and experiment.

소형 BLDC 전동기 센서리스 드라이브의 단상 역기전력과 중성점을 이용한 제어기법 연구 (A Study on a Control Method for Small BLDC Motor Sensorless Drive with the Single Phase BEMF and the Neutral Point)

  • 조준우;황돈하;황영기;정태욱
    • 조명전기설비학회논문지
    • /
    • 제28권9호
    • /
    • pp.1-7
    • /
    • 2014
  • Brushless Direct Current(BLDC) Motor is essential to measure a rotor position because of that this motor type needs to synchronize the rotor's position and changeover phase current instead of a brush and commutator used on the existing dc motor. Recently, many researches have studied on sensorless control drive for BLDC motor. The conventional control methods are a compensation value dq, Kalman filter, Fuzzy logic, Neurons neural network, and the like. These methods has difficulties of detecting BEMF accurately at low speed because of low BEMF voltage and switching noise. And also, the operation is long and complex. So, it is required a high-performance microprocessor. Therefore, it is not suitable for a small BLDC motor sensorless drive. This paper presents control methods suitable for economic small BLDC motor sensorless drive which are an improved design of the BEMF detection circuit, simplifying a complex algorithm and computation time reduction. The improved motor sensorless drive is verified stability and validity through being designed, manufactured and analyzed.