• Title/Summary/Keyword: switching power loss

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The Carrier-based SVPWM method for voltage balance of flying capacitor multilevel inverter (플라잉 커패시터 멀티-레벨 인버터의 커패시티 잔압 균형을 위한 캐리어 비교방식의 펄스 폭 변조 기법)

  • 강대욱
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.313-316
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    • 2000
  • This paper proposes a new solution by carrier-based SVPWM method to solve the most serious problem of Flying Capacitor Multi-level Inverter that is unbalance of capacitor voltages The voltage unbalance is occurred by the difference of each capacitor's charging and discharging time applied to Flying Capacitor Multi-level Inverter. It controls the variation of capacitor voltages into the mean'0' during some period by means of new carriers using the leg voltage redundancy in the Inverter. The solution can be easily expanded to the multi-level. Also this method can make the switching loss and conduction loss of device equal by the use of leg voltage redundancy. First the unbalance of capacitor voltage is analyzed and the conventional theory of self-balance using phase-shifted carrier is reviewed. And then the new method that is suitable to the Flying Capacitor Inverter is explained. The simulation results would be shown to verify the proposed method

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Fabrication of MEMS Type RF Switch Structure (MEMS형 RF Switch 구조물 제작)

  • Ku, Chan-Kyu;Kim, Heung-Rak;Kim, Young-Duk;Jung, Woo-Chul;Kim, Dong-Su;Nam, Hyo-Duk
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07b
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    • pp.809-812
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    • 2002
  • This paper presents the structures for a CPW shunt RF switch using MEMS(Micro Electro Mechanical System). Recent development in MEMS technology has made the design and fabrication of micro-mechanical switches as new switching elements. The micro-mechanical switches have low insertion loss, negligible power consumption, and good isolation compared to semiconductor switches. The fabricated structure shows an insertion loss of 2dB at 20GHz When a bias voltages of 12V is apply.

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A New Low Loss Snubber Circuit Suitable for Multilevel inverter and Converter

  • Kim, In-Dong;Nho, Eui-Cheol
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.541-546
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    • 1998
  • This paper proposes a new snubber circuit for multilevel inverter and converter. The snubber circuit makes use of Undeland snubber as basic snubber unit and can be regraded as a generalized Undeland snubber. The proposed snubber keeps such good features as fewer number of components, improved efficiency due to low loss snubber, capability of clamping overvoltage across main switching devices, and no unbalance problem of blocking voltage. Furthermore, the proposed concept of constructing a snubber circuit for multilevel inverter and converter can apply to any kind of basic snubber unit such as Holtz nondissipative snubber, McMurray efficient snubber, Lauritzen lossless snubber, etc which have been utilized for two-level inveter.

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Development of Electronic Ballast with Constant Power Output Controller for 250W MHD Lamp (250W MHD램프용 정출력 전자식 안정기의 개발)

  • 정동열;박종연
    • Proceedings of the IEEK Conference
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    • 2001.06e
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    • pp.99-102
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    • 2001
  • In this paper, the electronic ballast was developed to control 250W metal halide lamp. To avoid acoustic resonance phenomenon, we calculated the acoustic resonance band and determined the driving frequence to from 70kHz to 100kHz. Due to the switching loss of MOSFET, many problems are caused in the inverter circuit during lighting the lamp, so we have reduced the loss by connecting the capacitor to reduce inrush current In this paper, main research area is to find the methods to operate the Iamp on regulated constant output. After detecting the current I and voltage V of the lamp, we changed the driving frequency by changing the DC voltage level.

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A study on the fabrication of Y-branch for optical power distribution and its coupling properties with optical fiber (광분배를 위한 Y-branch 제작과 광파이버와의 결합특성에 관한 연구)

  • 김상덕;박수봉;윤중현;이재규;김종빈
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.12
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    • pp.3277-3285
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    • 1996
  • In this paper, w designed an opical power distribution device for application to an optical switching and an optical subscriber loop. We fabricated PSG thin film by LPCVD. Based on the measured index of fabricted thin film, rib-type waveguide was transformed to two-dimension by the effective index method and we simulated dispersion property to find asingle-mode condition. We found that the optimum design parameters of rib-type waveguide are:cladding layer of 3.mu.m, core layer of 3.mu.m, buffer layer of 10.mu.m, and core width of 4.mu.m. Each side of the guiding region was etched down to 4.mu.m to shape the core. We used these optimum parameters of the rib-type waveguide with branching angle of 0.5.deg. and simulted the Y-branch waveguide by the BPM simulation. Numerical loss in branching area was claculated to be 0.1581dB and equal to the total loss of the Y-branch. The loss of the fabricated Y-branch waveguide on PSG film ws 1.6dB at .lambda.=1.3.mu.m before annealing but was 1.2dB after annealing at 1000.deg. C for 10 minutes. Consequently, the loss of branching area from 3000.mu.m to 6000.mu.m in the z-direction was 0.8dB, and single-mode propagation was confirmed by measuring the near field pattern. For coupling the fabricated Y-branch waveguide with an optical fiber, we fabricated V-groove which was used as the upholder of optical fiber. An etching angle was 54.deg. and the width and depth of guiding groove was 150.mu.m, 70.mu.m, respectively. The optical fiber is inserted onto V-groove. Both the Y-branch and V-groove were connected through the index matching oil. Coupling loss after connecting Y-branch and the optical fiber on V-groove was 0.34dB and that after injecting index mateching oil was 0.14dB.

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A Merged-Capacitor Switching Technique for Sampling-Rate and Resolution Improvement of CMOS ADCs) (CMOS A/D 변환기의 샘플링 속도 및 해상도 향상을 위한 병합 캐패시터 스위칭 기법)

  • Yu, Sang-Min;Jeon, Yeong-Deuk;Lee, Seung-Hun
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.37 no.6
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    • pp.35-41
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    • 2000
  • This paper describes a merged-capacitor switching (MCS) technique to improve the signal Processing speed and resolution of CMOS analog-to-digital converters (ADCs). The proposed MCS technique improves a sampling rate by reducing the number of capacitors used in conventional pipelined ADCs. The ADC capacitor mismatch can be minimized without additional power consumption, die area, and the loss of sampling rate, when the size of each unit capacitor is increased as much as the number of capacitors reduced by the MCS technique. It is verified that the ADC resolution based on the proposed MCS technique is extended further by employing a conventional commutated feedback-capacitor switching (CFCS) technique.

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The Characteristics of Planar EMI Filter with Bi-Ground Layers Considering Impedance Mismatching

  • Wang, Shishang;Song, Zheng;Lou, Qianceng
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1200-1208
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    • 2016
  • Planar electromagnetic interference (EMI) filter has significant engineering significance to power electronic system integration and miniaturization. However, the value of differential mode capacitance cannot meet the demand of noise suppression because of the size limit of ceramics. In this case, the EMI filter of novel multilayers is recommended to address this issue. A novel integrated structure of EMI filter based on multilayer ceramic is proposed in this study. The inductance and capacitance of the new structure can be designed separately, which is an advantage in manufacturing. Insertion loss is measured more closely to the actual situation in this study, which is different from the condition where source and load impedances are both 50 Ω. In the process of designing a novel EMI filter, noise impedance is considered. Moreover, the prototype is created and applied to a small switching power supply, which verifies the effectiveness of the developed EMI filter.

An Achievement of High-rate Digital Subscriber Lines(HDSL) Interface Function into the ATM Switching System and its Service Implementation (ATM에HDSL 정합 기능 및 서비스 구현)

  • Yang, Choong-Reol;Chang, J.D.;Kim, J.T.;Kang, S.Y.;Kim, W.W.
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.9
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    • pp.2378-2390
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    • 1997
  • We, in this paper, have implemented E1 HDSL(high-bit-rate digital subscriber line) function over an ATM switching system. The maximum loop lengths for subscriber service and cell loss rates to meet the bit error rate of $10^{-7}$ at transmission of 2B1Q HDSL data of E1 rate over existing telephone copper wires in the presense of the significant impairments such as crosstalk, impulse noise, power line noise and longitudinal over the CSAs environment consisting of 26 gauge and 24 gauge unloaded copper telephone lines has assessed. We have confirmed the typical media services function such as video on demand(VOD) service for MPEG-1, image conference service and high-speed Internet access service over ATM switching system.

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Low-area Dual mode DC-DC Buck Converter with IC Protection Circuit (IC 보호회로를 갖는 저면적 Dual mode DC-DC Buck Converter)

  • Lee, Joo-Young
    • Journal of IKEEE
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    • v.18 no.4
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    • pp.586-592
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    • 2014
  • In this paper, high efficiency power management IC(PMIC) with DT-CMOS(Dynamic threshold voltage Complementary MOSFET) switching device is presented. PMIC is controlled PWM control method in order to have high power efficiency at high current level. The DT-CMOS switch with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuit consist of a saw-tooth generator, a band-gap reference(BGR) circuit, an error amplifier, comparator circuit, compensation circuit, and control block. The saw-tooth generator is made to have 1.2MHz oscillation frequency and full range of output swing from supply voltage(3.3V) to ground. The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on current mode PWM control circuits and low on-resistance switching device, achieved the high efficiency nearly 96% at 100mA output current. And Buck converter is designed along LDO in standby mode which fewer than 1mA for high efficiency. Also, this paper proposes two protection circuit in order to ensure the reliability.

Achievable Sum Rate Analysis of ZF Receivers in 3D MIMO Systems

  • Li, Xingwang;Li, Lihua;Xie, Ling
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.4
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    • pp.1368-1389
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    • 2014
  • Three-dimensional multiple-input multiple-output (3D MIMO) and large-scale MIMO are two promising technologies for upcoming high data rate wireless communications, since the inter-user interference can be reduced by exploiting antenna vertical gain and degree of freedom, respectively. In this paper, we derive the achievable sum rate of 3D MIMO systems employing zero-forcing (ZF) receivers, accounting for log-normal shadowing fading, path-loss and antenna gain. In particular, we consider the prevalent log-normal model and propose a novel closed-form lower bound on the achievable sum rate exploiting elevation features. Using the lower bound as a starting point, we pursue the "large-system" analysis and derive a closed-form expression when the number of antennas grows large for fixed average transmit power and fixed total transmit power schemes. We further model a high-building with several floors. Due to the floor height, different floors correspond to different elevation angles. Therefore, the asymptotic achievable sum rate performances for each floor and the whole building considering the elevation features are analyzed and the effects of tilt angle and user distribution for both horizontal and vertical dimensions are discussed. Finally, the relationship between the achievable sum rate and the number of users is investigated and the optimal number of users to maximize the sum rate performance is determined.