• Title/Summary/Keyword: switch array

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X-Band 6-Bit Phase Shifter with Low RMS Phase and Amplitude Errors in 0.13-㎛ CMOS Technology

  • Han, Jang-Hoon;Kim, Jeong-Geun;Baek, Donghyun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.511-519
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    • 2016
  • This paper proposes a CMOS 6-bit phase shifter with low RMS phase and amplitude errors for an X-band phased array antenna. The phase shifter combines a switched-path topology for coarse phase states and a switch-filter topology for fine phase states. The coarse phase shifter is composed of phase shifting elements, single-pole double-throw (SPDT), and double-pole double-throw (DPDT) switches. The fine phase shifter uses a switched LC filter. The phase coverage is $354.35^{\circ}$ with an LSB of $5.625^{\circ}$. The RMS phase error is < $6^{\circ}$ and the RMS amplitude error is < 0.45 dB at 8-12 GHz. The measured insertion loss is < 15 dB, and the return losses for input and output are > 13 dB at 8-12 GHz. The input P1dB of the phase shifter achieves > 11 dBm at 8-12 GHz. The current consumption is zero with a 1.2-V supply voltage. The chip size is $1.46{\times}0.83mm^2$, including pads.

Design of Monolithically Integrated Vertical Cavity Laser with Depleted Optical Thyristor for Optically Programmable Gate Array (Optically Programmable Gate Array 구현을 위한 수직 공진형 완전공핍 광싸이리스터)

  • Choi, Woon-Kyung;Kim, Do-Gyun;Choi, Young-Wan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.8
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    • pp.1580-1584
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    • 2009
  • We have theoretically analyzed the monolithic integration of vertical cavity lasers with depleted optical thyristor (VCL-DOT) structure and experimentally demonstrated optical logic gates such as AND-gate, OR-gate, and INVERTER implemented by VCL-DOT for an optical programmable gate array. The optical AND and OR gates have been realized by changing a input bias of the single VCL-DOTs and all kinds of optical logic functions are also implemented by adjusting an intensity of the reference input beams into the differential VCL-DOTs. To achieve the high sensitivity, high slope efficiency and low threshold current, a small active region of lasing part and a wide detecting area are simultaneously designed by using a selective oxidation process. The fabricated devices clearly show nonlinear s-shaped current-voltage characteristics and lasing characteristics of a low threshold current with 0.65 mA and output spectrum at 854 nm.

AoA-Based Local Positioning System Using a Time-Modulated Array

  • Baik, Kyung-Jin;Lee, Sangjoon;Jang, Byung-Jun
    • Journal of electromagnetic engineering and science
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    • v.17 no.4
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    • pp.181-185
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    • 2017
  • In this paper, we propose an angle-of-arrival (AoA)-based local positioning system using a time-modulated array (TMA). The proposed system can determine a two-dimensional position using only two TMAs without any synchronization between the two receivers. The hardware for the proposed system consists of two commercial monopole antennas, a self-designed switch, and a well-known software-defined radio receiver. Furthermore, the location can be simply estimated in real time without the need for complicated positioning algorithms such as the MUSIC and ESPRIT algorithms. In order to evaluate the performance of our system, we estimated the position of the wireless node in an office environment. The position was estimated with a mean error of less than 0.1 m. We therefore believe that our system is appropriate for various wireless local positioning applications.

New MPPT Control Strategy for Two-Stage Grid-Connected Photovoltaic Power Conditioning System

  • Bae, Hyun-Su;Park, Joung-Hu;Cho, Bo-Hyung;Yu, Gwon-Jong
    • Journal of Power Electronics
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    • v.7 no.2
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    • pp.174-180
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    • 2007
  • In this paper, a simple control method for two-stage utility grid-connected photovoltaic power conditioning systems (PCS) is proposed. This approach enables maximum power point (MPP) tracking control with post-stage inverter current information instead of calculating solar array power, which significantly simplifies the controller and the sensor. Furthermore, there is no feedback loop in the pre-stage converter to control the solar array voltage or current because the MPP tracker drives the converter switch duty cycle. This simple PCS control strategy can reduce the cost and size, and can be utilized with a low cost digital processor. For verification of the proposed control strategy, a 2.5kW two-stage photovoltaic grid-connected PCS hardware which consists of a boost converter cascaded with a single-phase inverter was built and tested.

A Small Areal Dual-Output Switched Capacitor DC-DC Converter with a Improved Range of Input Voltage (입력전압 범위가 향상된 저면적 이중출력 스위치드 커패시터 DC-DC 변환기)

  • Hwang, Seon-Kwang;Kim, Seong-Yong;Woo, Ki-Chan;Kim, Tae-Woo;Yang, Byung-Do
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.9
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    • pp.1755-1762
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    • 2016
  • In this paper, a small areal dual-output SC(switched capacitor) DC-DC converter with a improved range of an input voltage is presented. The conventional SC DC-DC converter has an advantage of low cost and small chip area. But, it has a narrow input voltage range to convert efficiently. Also, it has a lager chip area and a lower power efficiency from multiple outputs. The proposed SC DC-DC converter improves the power efficiency by using the capacitor array structure which efficiently converts the voltage according to the input voltage. By sharing two switch array, it reduces the number of switches and capacitors from 32 to 25. The proposed SC DC-DC converter was manufactured in a $0.18{\mu}m$ CMOS process. In the simulation, the range of the input voltage is 0.7~ 1.8V, the max. power efficiency is 90%, and the chip area is $0.255mm^2$.

A 3 V 12b 100 MS/s CMOS DAC for High-Speed Communication System Applications (고속통신 시스템 응용을 위한 3 V 12b 100 MS/s CMOS D/A 변환기)

  • 배현희;이명진;신은석;이승훈;김영록
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.9
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    • pp.685-691
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    • 2003
  • This work describes a 3 V 12b 100 MS/s CMOS digital-to-analog converter (DAC) for high-speed communication system applications. The proposed DAC is composed of a unit current-cell matrix for 8 MSBs and a binary-weighted array for 4 LSBs, considering linearity, power consumption, chip area, and glitch energy. The low-glitch switch driving circuit is employed to improve the linearity and the dynamic performance. Current sources of the DAC are laid out separately from the current-cell switch matrix core. The prototype DAC is implemented in a 0.35 urn n-well single-poly quad-metal CMOS technology. The measured DNL and INL of the prototype DAC are within $\pm$0.75 LSB and $\pm$1.73 LSB, respectively, and the spurious-free dynamic range (SFDR) is 64 dB at 100 MS/s with a 10 MHz input sinewave. The DAC dissipates 91 mW at 3 V and occupies the active die area of 2.2 mm ${\times}$ 2.0 mm.

The Determination of Multiplexing-Diversity Transition Mode in the Visual-MIMO System (Visual-MIMO 시스템에서의 다중화-다이버시티 모드 전환 결정)

  • Kim, Ji-won;Kim, Ki-doo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.1
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    • pp.42-50
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    • 2016
  • Recently, researches about the communication between LED array and the camera (alias 'Visual-MIMO'), have been actively conducted, and the application to the vehicle and a smart phone is expected to be maximized. Since the bit error may occur if the ISI is severe in a LED array, it is necessary to switch from the multiplexing to the diversity mode. In this paper, according to the use or not of a reference array pattern, a method for determining the transition time to the diversity mode is suggested and verified. When using the reference pattern, it determines the transition time to the diversity mode from the multiplexing using the brightness information of the received image. If the reference array pattern is not used, the size of LED array compared to the entire image according to the distance is used and the size of the LED array at the distance of a severe ISI may be used for the determination of transition time to the diversity. Finally, the proposed method is verified through the simulation and hardware experiments as well as by analyzing the performance in accordance with the ISI level and the distance.

Study of Seal-off Triggered Vacuum Switch(TVS) for High Voltage and High Current (고전압 대전류용, Seal-off TVS(Triggered Vacuum Switch) 연구)

  • Park, S.S.;Han, Y.J.;Kim, S.H.;Kwon, Y.K.;Kim, S.H.;Park, Y.J.;Hong, M.S.;Nam, S.H.
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1823-1826
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    • 2002
  • The purpose of this experiment was to develope Triggered Vacuum Switch (TVS) for the high voltage and high current. The TVS has an array of rods of alternate polarity in which a fixed gap spacing is maintained between the rods. The cross section of each rod has trapezoidal shape. It consists of electrode, ceramic chamber, getter and trigger. Currently, triggered vacuum switch (TVS) with seal-off has been designed and fabricated at PAL. An experimentation and trigger devices for TVS were designed for testing characteristics of electricity. For making the prototype of TVS, it is developed of fabrication process and fined of electrode material. The fabrication of the TVS is a lot of process which have manufacturing of part, chemical clean, ceramic brazing and metal welding. The fabricated TVS is tested of leak for vacuum, hold-off voltage and conditioning of trigger system. The TVS has pinch-off after it is removed of gas in the TVS and activated of getter in degassing furnace. The prototype TVS tested about 20 kV, 75 kA, 83 ${\mu}s$ with 100 kJ capacitor bank and inductance 5 ${\mu}H$. This paper describes the results of tests and the characteristics of the switch.

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A Study on design of the PZT Cantilever for Micro Switch (Micro Switch용 PZT Cantilever의 설계에 관한 연구)

  • Kim, In-Sung;Song, Jae-Sung;Min, Bok-Ki;Jeong, Soon-Jong;Muller, A.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.422-423
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    • 2005
  • RF Micro switches is a miniature device or an array of integration devices and mechanical components and fabricated with Ie batch-processing techniques. RF Micro switches application area are in phased arrays and reconfigurable apertures for defence and telecommunication systems, switching network for satellite communication, and single-pole double throw switches for wireless application. Recently, RF Micro switches have been developed for the application to the milimeter wave system. RF Micro switches offer a substantilly higher performance than PIN diode or FET switches. In this paper, SPDT(single-pole-double-throw) switch are designed to use 10 GHz. Actuation voltage and displacement are simulated by tool.

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The Characteristics and Technical Trends of Power MOSFET (전력용 MOSFET의 특성 및 기술동향)

  • Bae, Jin-Yong;Kim, Yong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.7
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    • pp.1363-1374
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    • 2009
  • This paper reviews the characteristics and technical trends in Power MOSFET technology that are leading to improvements in power loss for power electronic system. The silicon bipolar power transistor has been displaced by silicon power MOSFET's in low and high voltage system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits. The technology challenges involved in combining power handling capability with finger gate, trench array, super junction structure, and SiC transistor are described, together with examples of solutions for telecommunications, motor control, and switch mode power supplies.