• 한국전기전자재료학회논문지
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• 제18권6호
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• pp.532-537
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• 2005

In order to develop a tunable resonator which can be easily operated by DC bias and applied for microwave tunable filters and devices using ferroelectric thin or thick films, the non conductor backed-and conductor backed- coplanar stripline resonators have been designed and analyzed. They have been designed to be operated at 25 GHz which involve coplanar stripline input and output ports. The resonators have been simulated and analyzed using Ansoft HFSS. The research has been focused on the Quality factor of the coplanar stripline resonator. The conductor Q, box Q, and radiation Q of the resonators have been analyzed and calculated according to the substrate thickness & conductor width of the resonators. From these parameters, the loss factors of the coplanar stripline resonator have been investigated. The conducting Q of the coplanar stripline resonator has no relation with the thickness of dielectric substrate and increases as the conductor width increases. The box Q has no much relation with the thickness of substrate and the conductor width, which is above 2000. The radiation loss increases as the thickness of substrate and the conductor width increase. To decrease the radiation loss of the coplanar stripline resonator, a conductor backed coplanar stripline resonator has been proposed which has the unloaded Q of 170.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2001년도 추계 기술심포지움
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• pp.75-87
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• 2001

Three different kinds of substrate used in this study : bare Cu substrate, Ni-P/Cu substrate with a Ni-P layer thickness of $5\mu\textrm{m},$ and Au/Ni-P/Cu substrate with the Ni-P and Au layers of $0.15\mu\textrm{m}$ and $5\mu\textrm{m}$ thickness respectively. The wettability of various Sn-base solders was affected by the substrate metal finish used, i.e., nickel, gold and copper. On the Au/Ni-F/Cu substrate, Sn-base solders wet better than any of the other substrate metal finishes tested. The interfacial reaction between various substrate and Sn-base solder was investigated at $70^{\circ}C,$ $100^{\circ}C,$ $120^{\circ}C,$ $150^{\circ}C,$ $170^{\circ}C$ and $200^{\circ}C$ for reaction times ranging from 0 day to 60 day. Intermetallic phases was formed along a Sn-base solder/ various substrate interface during solid-state aging. The apparent activation energy for growth of Sn-Ag/Cu, Sn-Ag-Bi/Cu, and Sn-Bi/Cu couples were 65.4, 88.6, and 127.9 Kj/mol, respectively. After isothermal aging, the fracture surface shoved various characteristics depending on aging temperature and time, and the types of BGA pad.

• 한국전기전자재료학회논문지
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• 제25권7호
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• pp.537-542
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• 2012

DSSCs efficiency by thickness of $TiO_2$ photoelectrode and thickness differences between two substrates studied. DSSCs is made of the doctor blade method and photoelectrode annealing temperature elevated in a different ways. In addition, cells efficiencies of according to the different thickness between $TiO_2$ photoelectrode substrate and Pt counter electrode was measured. Efficiency of DSSCs made with $TiO_2$ photoelectrode of 18 ${\mu}m$ thickness and the gap difference between the substrate 28 ${\mu}m$ shows a highest 4.805% efficiency.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.121-124
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• 1999

The (Ba,Sr)TiO$_3$[BST] thin film were fabricated on the Pt/Ti/SiO$_2$/Si substrate by RF sputtering technique. The structural properties of the BST thin films were investigated with deposition time and substrate temperature by XRD. In the case of the BST thin films which has the deposition thin of 20 min, second phases and BST (111) peaks were increased with increasing the temperature of substrate. The capacitance of the BST thin film (deposition time of 20 min.) was decreased with the substrate temperature and was 1500pF with applied voltage of 1V.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2004년도 춘계종합학술대회
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• pp.658-660
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• 2004

본 논문에서는 DG MOSFET의 main gate와 side gate사이의 산화층 두께, 그리고 main gate와 Si 기판 사이의 산화층 두께를 변화시킴으로써 전기적 특성을 조사하였다. Main gate와 side gate사이의 간화층 두께가 4nm이고 main gate와 Si 기판사이의 산화층 두께가 3nm일 때 최적의 전기적 특성을 보였다. 이때, side gate 전압은 3V, 그리고 drain 전압은 1.5V를 인가하였다. 결과적으로 DG MOSFET의 전기적 특성은 main gate와 side gate 사이의 산화층 두께보다 main gate와 Si기판사이의 산화층 두께가 중요함을 알았다.

• Tribology and Lubricants
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• 제37권4호
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• pp.144-150
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• 2021

The most cost-effective method of reducing abrasive wear in mechanical parts is increasing their hardness with thin hard coatings. In practice, the composite hardness of the coated substrate is more important than that of the substrate or coating. After full unloading of the load applied to an indenter, its indentation hardness evaluated based on the dent created on the test piece was almost dependent on plastic deformation of the substrate. Following the first part of this study, which proposes a new Brinell hardness test method for a coated surface, the remainder of the study is focused on practical application of the method. Indentation analyses of a rigid sphere and elastic-perfect plastic materials were performed using finite element analysis software. The maximum principal stress and plastic strain distributions as well as the dent shapes according to the substrate yield stress and coating thickness were compared. The substrate yield stress had a significant effect on the dent size, which in turn determines the Brinell hardness. In particular, plastic deformation of the substrate produced dents regardless of the state of the coating layer. The hardness increase by coating behaved differently depending on the substrate yield stress, coating thickness, and indentation load. These results are expected to be useful when evaluating the composite hardness values of various coated friction surfaces.

• 대한전자공학회논문지TC
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• 제44권11호
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• pp.33-41
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• 2007

기판의 크기가 마이크로스트립 패치 안테나의 방사특성에 미치는 영향에 대하여 알아보았다. 기판의 폭을 고정시키고 길이를 변화시킬 때 방사패턴 특성이 크게 변화하나 기판 길이를 고정시키고 폭을 변화시킬 때는 방사패턴 특성이 거의 변화하지 않음을 볼 수 있었다. 기판 크기에 따른 방사패턴 특성의 변화는 기판 두께가 두꺼울 때가 작을 때보다 더 큼을 볼 수 있었다.

• Journal of the Optical Society of Korea
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• 제17권3호
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• pp.269-274
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• 2013

The effect of diffusing substrate and pillow lenses on the outcoupling efficiency of organic light-emitting diodes (OLEDs) was studied by optical simulation based on the point-dipole model. The diffusing substrate included Mie scatterers by which the condition of total internal reflection could be broken. The finite-difference time-domain method was used to obtain the intensity distribution on the transparent electrode of an OLED, which was used as a light source to carry out a ray-tracing simulation of the OLED and the diffusing substrate. It was found that the outcoupling efficiency of the OLED was sensitive to the thickness of organic layers and could be increased by 21.0% by adopting a diffusing substrate in which Mie scatterers whose radius was $2.0{\mu}m$ were included at the density of $10^7mm^{-3}$ and by 65.5% by forming one pillow lens with the radius of 2 mm on the front surface of the glass substrate. This study revealed that the outcoupling efficiency could be improved by adopting diffusing substrate and pillow lenses along with the optimization of the thickness of each layer in the OLED.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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• pp.301-306
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• 2000

This paper describes on the fabrication of a SOI substrate by SDB technology and electrochemical etch-stop. The surface of the thinned SDB SOI substrate is more uniform than that of grinding or polishing by mechanical method, and this process was found to be a very accurate method for SOI thickness control. During electrochemical etch-stop, leakage current versus voltage curves were measured for analysis of the open current potential(OCP) point, the passivation potential(PP) point and anodic passivation potential. The surface roughness and the controlled thickness selectivity of the fabricated a SDB SOI substrate were evaluated by using AFM and SEM, respectively.

• Transactions on Electrical and Electronic Materials
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• 제15권5호
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• pp.253-256
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• 2014

$Pb(Zr_{0.52}Ti_{0.48})O_3$ thin films of $1.5{\mu}m$ thickness were grown on $Pt/Ti/Gd_3Ga_5O_{12}$ substrate by RF magnetron sputtering at annealing temperatures ranging from $550^{\circ}C$ to $700^{\circ}C$. We evaluated the residual stress, by using a William-Hall plot, as a function of the annealing temperatures of PZT thin film with a constant thickness. As a result, the residual stresses of PZT thin film of $1.5{\mu}m$ thickness were changed by varying the annealing temperature. Also, we measured the hysteresis characteristic of PZT thin films of $1.5{\mu}m$ thickness to evaluate for application of an optoelectronic device.