• Journal of Electrical Engineering and Technology
• /
• v.11 no.4
• /
• pp.1020-1026
• /
• 2016

Motion estimation (ME) algorithms supporting quarter-pixel accuracy have been recently introduced to retain detailed motion information for high quality of video in the state-of-the-art video compression standard of H.264/AVC. Conventional sub-pixel ME algorithms in the spatial domain are faced with a common problem of computational complexity because of embedded interpolation schemes. This paper proposes a low-complexity sub-pixel motion estimation algorithm in the transform domain utilizing shifting matrix. Simulations are performed to compare the performances of spatial-domain ME algorithms and transform-domain ME algorithms in terms of peak signal-to-noise ratio (PSNR) and the number of bits per frame. Simulation results confirm that the transform-domain approach not only improves the video quality and the compression efficiency, but also remarkably alleviates the computational complexity, compared to the spatial-domain approach.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.639-642
• /
• 2005

Motion Estimation(ME) is an important part of video compression, because it requires a large amount of computation. Half-pixel and quarter-pixel motion estimation allows high video compression rates but it also has high computation complexity. In this paper we suggest a new and efficient motion estimation algorithm for half-pixel and quarter-pixel motion estimation using SAD values. In the method, an integer-pixel motion vector is found and then only three neighboring points of the integer-pixel motion vector is evaluated to find the half-pixel motion vector. The quarter-pixel motion vector is also found by using a similar method. Experimental results of our method shows 20% reduction in computation time, when compared with those of a conventional method, while producing same quality motion vectors.

• Journal of KIISE:Software and Applications
• /
• v.33 no.4
• /
• pp.411-417
• /
• 2006

Motion Estimation (ME) is an important part of video coding process and it takes the largest amount of computation in video compression. Half-pixel and quarter-pixel motion estimation can improve the video compression rate at the cost of higher computational complexity In this paper, we suggest a new efficient low-complexity algorithm for half-pixel and quarter pixel motion estimation. It is based on the experimental results that the sum of absolute differences(SAD) shows parabolic shape and thus can be approximated by using interpolation techniques. The sub-pixel motion vector is searched from the minimum SAD integer-pixel motion vector. The sub-pixel search direction is determined toward the neighboring pixel with the lowest SAD among 8 neighbors. Experimental results show that more than 20% reduction in computation time can be achieved without affecting the quality of video.

• Proceedings of the KIEE Conference
• /
• 2007.04a
• /
• pp.26-28
• /
• 2007

The motion estimation is the most important technique in the image compression of the video standards. In the case of next generation standards in the video codec as H.264, a high compression-efficiency can be also obtained by using a motion compensation. To obtain the accurate motion search, a motion estimation should be achieved up to 1/2 pixel and 1/4 pixel uiuts. To do this, the computational complexity is increased although the image compression rate is increased. Therefore, in this paper, we propose the advanced sub-pixel block matching algorithm to reduce the computational complexity by using a statistical characteristics of SAD(Sum of Absolute Difference). Generally, the probability of the minimum SAD values is high when searching point is in the distance 1 from the reference point. Thus, we reduced the searching area and then we can overcome the computational complexity problem. The main concept of proposed algorithm, which based on TSS(Three Step Search) method, first we find three minimum SAD points which is in integer distance unit, and then, in second step, the optimal point is in 1/2 pixel unit either between the most minimum SAD value point and the second minimum SAD point or between the most minimum SAD value point and the third minimum SAD point In third step, after finding the smallest SAD value between two SAD values on 1/2 pixel unit, the final optimized point is between the most minimum SAD value and the result value of the third step, in 1/2 pixel unit i.e., 1/4 pixel unit in totally. The conventional TSS method needs an eight.. search points in the sub-pixel steps in 1/2 pixel unit and also an eight search points in 1/4 pixel, to detect the optimal point. However, in proposed algorithm, only total five search points are needed. In the result. 23 % improvement of processing speed is obtained.

• Proceedings of the IEEK Conference
• /
• 2008.06a
• /
• pp.807-808
• /
• 2008

In H.264, sub-pel motion estimation (ME) has strong effect when coding video sequences. 1/4-pel performs better at low bitrate while 1/8-pel gives better results at high bitrate. In this paper, a variable sub-pixel motion vector resolution based on block mode motion estimation method is proposed. Experiment results show that the proposed method can take the advantage of 1/4-pel at low bitrate and 1/8-pel at high bitrate. In addition to that, time is reduced from 14% to 53% compared to KTA1.3 with 1/8-pel motion vector (MV) resolution.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.44 no.3
• /
• pp.16-22
• /
• 2007

Motion Estimation time in the H.264 has a large portion of encoding time and must be improved for real time application. Most of proposed motion estimation algorithm including Sub-pixel search use the fast search algorithm to speed up motion estimation by targeting the performance of full search in the reference code. This paper proposes a novel fast sub-pixel search control algorithm for H.264 encoder by using neighbor motion vector after analyzing the encoded Motion vector of video sequence. In addition the horizontal/vertical searching method is proposed with the horizontal/vertical directionality of motion vector. And the evaluation is performed with the proposed algorithms and other reference algorithms.

• Proceedings of the IEEK Conference
• /
• 2007.07a
• /
• pp.383-384
• /
• 2007

In this paper, we propose the new and simple method for sub-pixel block search algorithm by only using integer-pixel for motion estimation and compensation. In many papers, the fast search block match algorithms based on TSS have been proposed. However, these methods could be achieved a little reduction of the computational complexity. All of searching points by 1/4-pixel have own predicted integer-pixel SAD array. Therefor, if we know initial nine SAD values by integer, which is on the searching area of the reference frame, then we can find optimal searching point by 1/4-pixel, directly.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.40 no.5
• /
• pp.322-331
• /
• 2003

Advances of high-definition television(HDTV) and personal computers call for the mutual conversion between interlaced signal and progressive signal. Especially, deinterlacing which is known as an interlaced to progressive conversion has been recently required and investigated. In this paper, we propose new deinterlacing algorithm considering sub-pixel motion information. In order to reduce the error of motion estimation, we analyze the effect of inaccurate sub-pixel motion information and model it as zero-mean Gaussian noises added respectively to each low resolution image(field). The error caused by inaccurate motion information is reduced by determining regularization parameter according to the error of motion estimation in each channel. The validity of the proposed algorithm is demonstrated both theoretically and experimentally in this paper.

• The KIPS Transactions:PartA
• /
• v.18A no.6
• /
• pp.249-254
• /
• 2011

This paper describes an efficient design of the interpolation circuit to generate the luma and chroma sub-pixels for H.264 motion estimation. The circuit based on the proposed architecture does not require any input data buffering and processes the horizontal, vertical and diagonal sub-pixel interpolations in parallel. The performance of the circuit is further improved by simultaneously processing the 1/2-pixel and 1/4-pixel interpolations for luma components and the 1/8-pixel interpolations for chroma components. In order to reduce the circuit size, we store the intermediate data required to process all the interpolations in parallel in the internal SRAM's instead of registers. We described the proposed circuit at register transfer level and verified its operation on FPGA board. We also synthesized the gate-level circuit using 130nm CMOS standard cell library. It consists of 20,674 gates and has the maximum operating frequency of 244MHz. The total number of SPSRAM bits used in our circuit is 3,232. The size of our circuit (including logic gates and SRAM's) is smaller than others and the performance is still comparable to them.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.40 no.2
• /
• pp.372-379
• /
• 2015

The latest video compression standard (such as H.264/AVC and HEVC) utilizes quarter-pel accuracy motion estimation in order to retain detailed motion information. Many sub-pixel motion estimation algorithms used in the spatial domain usually encounters increment of computational complexity due to embedded interpolation algorithm. In this paper, an approach to measure sub-pixel accuracy motion estimation in frequency domain using shifting matrix is proposed. Complexity can be reduced utilizing shifting matrix algorithm in frequency domain and simulation results demonstrate not only higher PSNR but lower bit rates than spatial domain algorithms.