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http://dx.doi.org/10.3745/KIPSTA.2011.18A.6.249

Design of Luma and Chroma Sub-pixel Interpolator for H.264 Motion Estimation  

Lee, Seon-Young (전자부품연구원 융합신호SoC연구센터)
Cho, Kyeong-Soon (한국외국어대학교 전자공학과)
Publication Information
The KIPS Transactions:PartA / v.18A, no.6, 2011 , pp. 249-254 More about this Journal
Abstract
This paper describes an efficient design of the interpolation circuit to generate the luma and chroma sub-pixels for H.264 motion estimation. The circuit based on the proposed architecture does not require any input data buffering and processes the horizontal, vertical and diagonal sub-pixel interpolations in parallel. The performance of the circuit is further improved by simultaneously processing the 1/2-pixel and 1/4-pixel interpolations for luma components and the 1/8-pixel interpolations for chroma components. In order to reduce the circuit size, we store the intermediate data required to process all the interpolations in parallel in the internal SRAM's instead of registers. We described the proposed circuit at register transfer level and verified its operation on FPGA board. We also synthesized the gate-level circuit using 130nm CMOS standard cell library. It consists of 20,674 gates and has the maximum operating frequency of 244MHz. The total number of SPSRAM bits used in our circuit is 3,232. The size of our circuit (including logic gates and SRAM's) is smaller than others and the performance is still comparable to them.
Keywords
Motion Estimation; H.264; Interpolation; Sub-pixel; Circuit Architecture;
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