• 한국가스학회지
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• 제8권4호
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• pp.62-69
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• 2004

정전기 방전으로 인한 재해방지, 생산효율의 향상, 정전기 방전에 민감한 전자소자의 보호를 위하여 각종 생산 공정에서는 정전기의 제전이 필요하다. 그래서 필름생산공장, 도장공장, 반도체 공장 등에서 이러한 정전기를 제거하기 위하여 제전기를 사용하고 있다. 본 연구에서는 전압인가식 제전기 bar의 길이, 동관의 길이 및 전극 간격을 변화시켜가면서 최적의 제전효율을 가지는 조건을 고찰하고, 이러한 조건에서 발생되는 방전에 의한 가연성 가스의 폭발 유무를 연구하였다. 그 결과 제전효율은 각각의 제전 bar에서 접지전극과 침상전극 사이의 간격이 8-11(mm)사이 일 때 최적의 제전효율을 나타내는 것을 알 수 있으며, 최적의 제전효율을 나타내는 bar에 대하여 가연성 가스의 폭발실험을 한 결과 폭발은 일어나지 않는 것을 알 수 있었다. 이상과 같이 본 연구를 통하여 나타난 결과를 이용하여 최적의 제전효율과 안전성을 가지는 방폭형 전압인가식 제전기 개발에 필요한 자료를 제시함으로써 산업현장에서 발생하는 가연성 가스에 의한 폭발사고를 미연에 방지할 수 있을 것으로 사료된다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1995년도 추계학술대회 논문집
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• pp.361-364
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• 1995

The static charges are generated by streaming electrification phenomena when insulating oil flowing by force for the purpose of cooling at the internal of Ultra-high power transformer. In this thesis, their elimination method was studied. The falter represents a greet much electrification characteristics because falter has large interfaces with liquid. In this paper, the streaming-electrification phenomena of insulating oil by metal filter were measured by mesh number, oil flow rate, oil temperature and a kind of mesh and The effect of charge elimination by metal filter generated minus ion was measured.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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• pp.127-130
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• 1988

This paper describes digital simulation of harmonic elimination in the FC-TCR. (Fixed Capacitor and Thyristor Controlled Reactor) A model at harmonic frequency is developed for a STATIC VAR compansator. The model is shown to be useful in predicting resonance condition. A new variable filter is used for synthesized harmonic elimination.

• 전기의세계
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• 제14권3호
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• pp.28-33
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• 1965

This experiment is based on "the feasible improvement studies for an eliminating device of the static electricity which applies the ionizing effect of beta radiation." In order to accomplish this object, the following problems were necessarily considered to investigate and to determine. The efficiency of the elimination of static electricity was determined by means of measuring the ion current between electrically charged plates with micro-ammeter. The effects of various factors, i.e., the distance between charged plate and radiation source, the activity of radiation source, the electric otential and the area of the charged plate, the shape of the source housing, the lining of backscattering material (Pb) on the source housing surface and blowing of ionized air, on the static electricity eliminating efficiency were studied. The beta radiation sources used in this experiment were S$^{35}$ and Sr$^{90}$ -Y$^{90}$ . It was revealed that ion current increased with source activity, the electric potential and area of the plates, the lead (Pb) lining on the surface of the source housing and the velocity of the ionized air blowing. As one could expect the S$^{35}$ was more effective to increase the ion current since it is known to be a higher specific ionization source than Sr$^{90}$ -Y$^{90}$ . The detailed result and performance of the eliminating device of the static electricity are described here.ibed here.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.624-626
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• 1993

The Electrical Charge generated by friction in flowing insulating oil can create hazadous accidents. Neutralization of static charges in the oil during transportation is an obvious method of overcoming the problem of internal electric charge. It is known that SCR(Static Charge Reducer) can neutralize much of this charge by the needle electrode and mixing it with the original charge. In our experiment, a filter to generate static charge was set just befor a measurement pipe, and streaming current from the filter to the earth $I_s$, current from the electrode to the earth $I_e$ and current from the receiving tank to the earth $I_f$ were measured in a steady state. As a result, charge density and needle electrode current increases with increasing of oil temperature. Charge elimination rate decreases with increasing of oil flow rate, and increases with increases of oil temperature. Faraday Cage current decreases with increasing of oil temperature.

• Journal of Computing Science and Engineering
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• 제2권3호
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• pp.301-320
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• 2008

Partial redundancy elimination (PRE) is an interesting compiler optimization because of its effectiveness and generality. Among many PRE algorithms, the one in static single assignment form (SSAPRE) has benefits over other bit-vector-based PRE algorithms. It preserves the properties of the SSA form after PRE and exploits the sparsity of the SSA form, resulting in reduced analysis and optimization time. This paper presents a practical improvement of the SSAPRE algorithm that further reduces the analysis and optimization time. The underlying idea is removing unnecessary ${\Phi}$'s during the ${\Phi}$-Insertion phase that is the first step of SSAPRE. We classify the expressions into three categories: confined expressions, local expressions, and the others. We show that unnecessary ${\Phi}$'s for confined and local expressions can be easily detected and removed. We implement our locality-based SSAPRE algorithm in a C compiler and evaluate its effectiveness with 20 applications from SPEC benchmark suites. In our measurements, on average 91 of ${\Phi}$'s identified by the original demand-driven SSAPRE algorithm are unnecessary for PRE. Pruning these unnecessary ${\Phi}$'s in the ${\Phi}$-Insertion phase makes our locality-based SSAPRE algorithm 1.8 times faster, on average, than the original SSAPRE algorithm.

• Structural Engineering and Mechanics
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• 제84권2호
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• pp.181-206
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• 2022

This paper presents experimental modal analysis and static load testing results to validate the accuracy of dynamic parameters-based damage locating indices in RC structures. The study investigates the accuracy of different dynamic-based damage locating indices compared to observed crack patterns from static load tests and how different damage levels and scenarios impact them. The damage locating indices based on mode shape curvature and mode shape fourth derivate in their original forms were found to show anomalies along the beam length and at the supports. The modified forms of these indices show higher sensitivity in locating single and multi-cracks at different damage scenarios. The proposed stiffness reduction index shows good sensitivity in detecting single and multi-cracks. The proposed anomalies elimination procedure helps to remove the anomalies along the beam length. Also, the adoption of the proposed weighting method averaging procedure and normalization procedure help to draw the overall crack pattern based on the adopted set of modes.

• 대한기계학회논문집A
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• 제33권12호
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• pp.1401-1409
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• 2009

All the forces in the real world act dynamically on structures. Design and analysis should be performed based on the dynamic loads for the safety of structures. Dynamic (transient or vibrational) responses have many peaks in the time domain. Topology optimization, which gives an excellent conceptual design, mainly has been performed with static loads. In topology optimization, the number of design variables is quite large and considering the peaks is fairly costly. Topology optimization in the frequency domain has been performed to consider the dynamic effects; however, it is not sufficient to fully include the dynamic characteristics. In this research, linear dynamic response topology optimization is performed in the time domain. First, the necessity of topology optimization to directly consider the dynamic loads is verified by identifying the relationship between the natural frequency of a structure and the excitation frequency. When the natural frequency of a structure is low, the dynamic characteristics (inertia effect) should be considered. The equivalent static loads (ESLs) method is proposed for linear dynamic response topology optimization. ESLs are made to generate the same response field as that from dynamic loads at each time step of dynamic response analysis. The method was originally developed for size and shape optimizations. The original method is expanded to topology optimization under dynamic loads. At each time step of dynamic analysis, ESLs are calculated and ESLs are used as the external loads in static response topology optimization. The results of topology optimization are used to update the design variables (density of finite elements) and the updated design variables are used in dynamic analysis in a cyclic manner until the convergence criteria are satisfied. The updating rules and convergence criteria in the ESLs method are newly proposed for linear dynamic response topology optimization. The proposed updating rules are the artificial material method and the element elimination method. The artificial material method updates the material property for dynamic analysis at the next cycle using the results of topology optimization. The element elimination method is proposed to remove the element which has low density when static topology optimization is finished. These proposed methods are applied to some examples. The results are discussed in comparison with conventional linear static response topology optimization.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2003년도 추계학술대회
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• pp.1316-1321
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• 2003

The systematic method to construct equivalent static load from the given dynamic load is proposed in the present study. Previously reported works to construct equivalent static load were based on ad hoc methods. They may results in unreliable structural design. The present study proposes a selection scheme of degrees of freedom(d.o.f) for imposing the equivalent static loads. The d.o.fs are selected by Two-level condensation scheme(TLCS). TLCS consists of two two-steps. The first step is the energy estimation in element-level and the second step consists of the traditional sequential elimination precudure. Through several numerical examples, the efficiency and reliability of proposed scheme is verified.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.357-360
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• 2002

In this paper, we propose a technique to eliminate 1,he effect of false paths in the calculation of the distribution of the maximum delay of a given CMOS combinatorial circuit, when distributions of interconnect delays and gate switching delays of the circuit are given. The technique can be incorporated into our algorithm for the statistical static timing analysis, which can take correlations of the delays into account.