• Title/Summary/Keyword: spin transistor

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Structural and Electrical Features of Solution-Processed Li-doped ZnO Thin Film Transistor Post-Treated by Ambient Conditions

  • Kang, Tae-Sung;Koo, Jay-Hyun;Kim, Tae-Yoon;Hong, Jin-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.242-242
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    • 2012
  • Transparent oxide semiconductors are increasingly becoming one of good candidates for high efficient channel materials of thin film transistors (TFTs) in large-area display industries. Compare to the conventional hydrogenated amorphous silicon channel layers, solution processed ZnO-TFTs can be simply fabricated at low temperature by just using a spin coating method without vacuum deposition, thus providing low manufacturing cost. Furthermore, solution based oxide TFT exhibits excellent transparency and enables to apply flexible devices. For this reason, this process has been attracting much attention as one fabrication method for oxide channel layer in thin-film transistors (TFTs). But, poor electrical characteristic of these solution based oxide materials still remains one of issuable problems due to oxygen vacancy formed by breaking weak chemical bonds during fabrication. These electrical properties are expected due to the generation of a large number of conducting carriers, resulting in huge electron scattering effect. Therefore, we study a novel technique to effectively improve the electron mobility by applying environmental annealing treatments with various gases to the solution based Li-doped ZnO TFTs. This technique was systematically designed to vary a different lithium ratio in order to confirm the electrical tendency of Li-doped ZnO TFTs. The observations of Scanning Electron Microscopy, Atomic Force Microscopy, and X-ray Photoelectron Spectroscopy were performed to investigate structural properties and elemental composition of our samples. In addition, I-V characteristics were carried out by using Keithley 4,200-Semiconductor Characterization System (4,200-SCS) with 4-probe system.

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Fabrication of SOI FinFET devices using Aresnic solid-phase-diffusion (비소 고상확산방법을 이용한 MOSFET SOI FinFET 소자 제작)

  • Cho, Won-Ju;Koo, Hyun-Mo;Lee, Woo-Hyun;Koo, Sang-Mo;Chung, Hong-Bay
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.133-134
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    • 2006
  • A simple doping method to fabricate a very thin channel body of the n-type fin field-effect-transistor (FinFET) with a 20 nm gate length by solid-phase-diffusion (SPD) process is presented. Using As-doped spin-on-glass as a diffusion source of arsenic and the rapid thermal annealing, the n-type source-drain extensions with a three-dimensional structure of the FinFET devices were doped. The junction properties of arsenic doped regions were investigated by using the $n^+$-p junction diodes which showed excellent electrical characteristics. Single channel and multi-channel n-type FinFET devices with a gate length of 20-100 nm was fabricated by As-SPD and revealed superior device scalability.

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Fabrication of the solution-processible OLED/OTFT by the gravure printing/contact transfer: role of the surface treatment

  • Na, Jung-Hoon;Kim, Sung-Hyun;Kang, Nam-Su;Yu, Jae-Woong;Im, Chan;Chin, Byung-Doo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1638-1641
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    • 2008
  • We have investigated the effectiveness of a gravure printing method for the fabrication of organic light-emitting diode (OLED) and Organic Thin Film Transistor (OTFT). Printing of the organic layers was performed with a small-scale gravure coating machine, while the metallic layers were vacuum-evaporated. Devices with gravure-printed layers are at least comparable with the spin-coated devices. Effects of the solvent formulation and surface energy mismatch between the organic layer materials on the printed patterns and device performance were discussed. We will present the initial design and experimental data of OTFT fabricated by roll-type soft contact transfer process.

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Fabrication and Properties of Metal/Ferroelectrics/Insulator/Semiconductor Structures with ONO buffer layer (ONO 버퍼층을 이용한 Metal/Ferroelectrics/Insulator/Semiconductor 구조의 제작 및 특성)

  • 이남열;윤성민;유인규;류상욱;조성목;신웅철;최규정;유병곤;구진근
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.305-309
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    • 2002
  • We have successfully fabricated a Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure using Bi$\sub$4-x/La$\sub$x/Ti$_3$O$\sub$12/ (BLT) ferroelectric thin film and SiO$_2$/Nitride/SiO$_2$ (ONO) stacked buffer layers for single transistor type ferroelectric nonvolatile memory applications. BLT films were deposited on 15 nm-thick ONO buffer layer by sol-gel spin-coating. The dielectric constant and the leakage current density of prepared ONO film were measured to be 5.6 and 1.0 x 10$\^$-8/ A/$\textrm{cm}^2$ at 2MV/cm, respectively, It was interesting to note that the crystallographic orientations of BLT thin films were strongly effected by pre-bake temperatures. X-ray diffraction patterns showed that (117) crystallites were mainly detected in the BLT film if pre-baked below 400$^{\circ}C$. Whereas, for the films pre-baked above 500$^{\circ}C$, the crystallites with preferred c-axis orientation were mainly detected. From the C-V measurement of the MFIS capacitor with c-axis oriented BLT films, the memory window of 0.6 V was obtained at a voltage sweep of ${\pm}$8 V, which evidently reflects the ferroelectric memory effect of a BLT/ONO/Si structure.

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Fabrication of Organic Thin-Film Transistor Using Vapor Deposition Polymerization Method (Vapor Deposition Polymerization 방법을 이용한 유기 박막 트렌지스터의 제작)

  • 표상우;김준호;김정수;심재훈;김영관
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.190-193
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    • 2002
  • The processing technology of organic thin-film transistors (Ons) performances have improved fur the last decade. Gate insulator layer has generally used inorganic layer, such as silicon oxide which has properties of a low electrical conductivity and a high breakdown field. However, inorganic insulating layers, which are formed at high temperature, may affect other layers termed on a substrate through preceding processes. On the other hand, organic insulating layers, which are formed at low temperature, dose not affect pre-process. Known wet-processing methods for fabricating organic insulating layers include a spin coating, dipping and Langmuir-Blodgett film processes. In this paper, we propose the new dry-processing method of organic gate dielectric film in field-effect transistors. Vapor deposition polymerization (VDP) that is mainly used to the conducting polymers is introduced to form the gate dielectric. This method is appropriate to mass production in various end-user applications, for example, flat panel displays, because it has the advantages of shadow mask patterning and in-situ dry process with flexible low-cost large area displays. Also we fabricated four by four active pixels with all-organic thin-film transistors and phosphorescent organic light emitting devices.

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Study on the Organic Gate Insulators Using VDP Method (VDP(Vapor Deposition Polymerization) 방법을 이용한 유기 게이트 절연막의 대한 연구)

  • Pyo, Sang-Woo;Shim, Jae-Hoon;Kim, Jung-Soo;Kim, Young-Kwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.185-190
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    • 2003
  • In this paper, it was demonstrated that the organic thin film transistors were fabricated by the organic gate insulators with vapor deposition polymerization (VDP) processing. In order to form polyimide as a gate insulator, vapor deposition polymerization process was also introduced instead of spin-coating process, where polyimide film was co-deposited by high-vacuum thermal evaporation from 4,4'-oxydiphthalic anhydride (ODPA) and 4,4'-oxydianiline (ODA) and 2,2-bis(3,4-dicarboxyphenyl)hexafluoropropane dianhydride (6FDA) and ODA, and cured at $150^{\circ}C$ for 1hr. Electrical output characteristics in our organic thin film transistors using the staggered-inverted top-contact structure obtained to the saturated slop in the saturation region and the subthreshold non-linearity in the triode region. Field effect mobility, threshold voltage, and on-off current ratio in $0.45\;{\mu}m$ thick gate dielectric layer were about $0.17\;cm^2/Vs$, -7 V, and $10^6\;A/A$, respectively. Details on the explanation of compared to organic thin-film transistors (OTFTS) electrical characteristics of ODPA-ODA and 6FDA-ODA as gate insulators by fabricated thermal co-deposition method.

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A Study on the Electrical Characteristics of Pentacene Organic Thin Film Transistor using Organic Gate Insulator (유기물 게이트 절연체를 사용한 pentacene 유기 박막 트랜지스터의 전기적 특성에 관한 연구)

  • Kim, Yun-Myoung;Kim, Ok-Byoung;Kim, Jung-Soo;Kim, Young-Kwan;Zyung, Tae-Hyung
    • Proceedings of the KIEE Conference
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    • 2000.11c
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    • pp.446-448
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    • 2000
  • Organic semiconductors based on vacuum-deposited films of fused-ring polycyclic aromatic hydrocarbon have great potential to be utilized as an active layer for electronic and optoelectronic devices. In this study, pentacene thin films and electrode materials were deposited by Organic Molecular Beam Deposition (OMBD) and vacuum evaporation respectively. For the gate dielectric layer, OPTMER PC403 photo acryl (JSR Coporation.) was spin-coated and cured at $220^{\circ}C$. Electrical characteristics of the devices were investigated, where the channel length and width was $50{\mu}m$ and 5 mm. It was found that field effect mobility was $0.039\;cm^2V^{-1}s^{-1}$, threshold voltage was -7 V, and on/off current ratio was $10^6$.

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Study on the Characteristics of Organic TFT Using Pentacene as a Active Layer (Pentacene을 활성층으로 이용한 유기 TFT의 특성 연구)

  • Kim, Young-Kwan;Sohn, Byoung-Chung;Kim, Yun-Myoung;Pyo, Sang-Woo
    • Journal of the Korean Applied Science and Technology
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    • v.18 no.3
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    • pp.191-196
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    • 2001
  • Organic semiconductors based on vacuum-deposited films of fused-ring polycyclic aromatic hydrocarbon have great potential to be utilized as an active layer for electronic and optoelectronic devices. In this study, pentacene thin films and electrode materials were deposited by Organic Molecular Beam Deposition (OMBD) and vacuum evaporation respectively. For the gate dielectric layer, photoacryl (OPTMER PC403 from JSR Co.) was spin-coated and cured at $220^{\circ}C$. Electrical characteristics of the device were investigated, where the channel length and width was 50 ${\mu}m$ and 5 mm. It was found that field effect mobility was 0.039 $cm^{2}V^{-1}s^{-1}$, threshold voltage was -8 V, and on/off current ratio was $10^{6}$. Further details will be discussed.

Solution-Processed Indium Oxide Transistors

  • Facchetti, Antonio;Kim, Hyun-Sung;Byrne, Paul D.;Marks, Tobin J.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.995-997
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    • 2009
  • $In_2O_3$ thin-film transistors (TFTs) were fabricated on various dielectrics [$SiO_2$ and self-assembled nanodielectrics (SANDs)] by spin-coating a $In_2O_3$ film precursor solution consisting of methoxyethanol (solvent), ethanolamine (EAA, base), and $InCl_3$ as the $In^{3+}$ source. Importantly, an optimized film microstructure characterized by the high-mobility $In_2O_3$ 004 phase, is obtained only within a well-defined base: $In^{3+}$ molar ratio. The greatest electron mobilities of ~ 44 $cm^2$, for EAA:$In^{3+}$ molar ratio = 10, $V^{-1}s^{-1}$, is measured for $n^+$-Si/SAND/$In_2O_3$/Au devices. This result combined with the high $I_{on}:I_{off}$ ratios of ~ $10^6$ and very low operating voltages (< 5 V) is encouraging for high-speed applications.

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Synthesis and Characterization of Perylene-based Pyrrolopyrone Derivative for Organic Thin Film Transistor

  • Kim, Hyung-Sun;Jung, Sung-Ouk;Kim, Yun-Hi;Do, Lee-Mi;Kwon, Soon-Ki
    • Journal of Information Display
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    • v.6 no.4
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    • pp.1-5
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    • 2005
  • Perylene-based pyrrolopyrone derivative (PPD) was synthesized via condensation reaction with perylenetetracarboxylic dianhydride and 1,2-phenylenediarnine as n-type channel material. The structure of PPD was characterized by spectroscopic methods such FT-IR and $^1H$-NMR. PPD exhibited high thermal stability ($T_{d5wt%}: 560^{\circ}C$) and was found to be soluble only in protonic solvents with high acidity such as methane sulfonic acid and trifluoroacetic acid. The PPD solution showed maximum absorption and emission at 601 and 628 nm, respectively. Thin film transistors were fabricated by vacuum deposition and solution casting method. The electron mobilities of the devices were achieved as high as $0.17{\times}10^{-6}cm^2/Vs$ for vacuum deposited device and $0.4{\times}10^{-6}cm^2/Vs$ for spin coated device, respectively.