• Journal of the Korean Society of Food Science and Nutrition
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• v.30 no.2
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• pp.199-203
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• 2001

Chopi, Zanthaxylum piperitum DC., has been used as natural spice traditionally in the Far East countries including Korea. This study was performed with the object of providing basic data, firstly for the decision of the appropriate harvesting time for traditional use of chopi and secondly for developing a new spice satisfying the national dietary custom from chopi as raw material. Concerning the conte수 and its change of the proximate composition, the content of moisture and crude protein decreased in all sample, while the content of fiber and ash tended to increased with the lapse of harvest time. The content of mineral elements tended to increase in every sample with the lapse of harvest time, and contents of K and P were higher than that of Ca, Na and Mg. Every sample showed the highest content of 15~16 components of total amino acids at the first period and the content decreased gradually with the lapse of harvest time. On the basis of the first period, every sample showed the highest content of aspartic acid, the lowest content of methionine and the trace of cysteine. Free amino acids increased considerably with the lapse of harvest time for peels of chopi and minchopi broth, while the amount for leaves increased on the contrary.

• Journal of the Korean Society for Railway
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• v.14 no.5
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• pp.411-415
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• 2011

DC/DC switching power converters are commonly used to generate a regulated DC output voltages with high efficiencies from different DC input sources. The voltage mode DC/DC converter utilizes MOSFET (metal-oxide semiconductor field effect transistor), inductor, and a PWM (pulse-width modulation) controller with oscillator, amplifier, and comparator, etc. to efficiently transfer energy from the input to the output at periodic intervals. The fundamental boost converter and a buck converter containing a switched-mode power supply are studied. In this paper, the electrical characteristics of DC/DC power converters are simulated by program of SPICE, and the PWM controller is implemented to check the operation. In addition, power efficiency is analyzed based on the specification of each component.

• Journal of the Korean Society for Railway
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• v.15 no.2
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• pp.116-121
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• 2012

DC/DC switching power converters produce DC output voltages from different DC input sources. The converter is used in regenerative braking of DC motors to return energy back in the supply, resulting in energy savings for the systems containing frequent stops. The DC/DC converter is composed of a PWM-IC (pulse width modulation integrated circuit) controller, a MOSFET (metal-oxide semi-conductor field-effect transistor), an inductor, capacitors, and resistors, etc. PWM is applied to control and regulate the total output voltage. In this paper, radiation shows the main influence on the changes in the electrical characteristics of comparator, operational amplifier, etc. in PWM-IC. In the PWM-IC operation, the missing pulses, the changes in pulse width, and the changes of the output waveform are studied by the simulation program with integrated circuit emphasis (SPICE) and compared with experiments.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.75-78
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• 1998

The SONOSFET Shows low operation voltage, high cell density, anti good endurance due to modified Fowler-Nordheim tunneling as memory charge injection method. In this paper, therefore, the NOR-type Flash EEPROM composed of SONOSFET, which has fast lead operation speed and Random Access characteristics, is proposed. An 8${\times}$8 bit NOR-type SONOSFET Flash EEPROM had been designed and its electrical characteristics were verified. Read/Write/Erase operations of it were verified with the spice parameters of SONOSFETs which had Oxide-Nitride-Oxide thickness of 65${\AA}$-165${\AA}$-35${\AA}$ and that of scaled down as 33${\AA}$-53${\AA}$-22${\AA}$, respectively. When the memory window of the scaled-down SONOSFET with 8V operation was similar to that of the SONOSFET with 13V operation, the Read operation delay times of the scaled-down SONOSFET were 25.4ns at erase state and 32.6ns at program state, respectively, and those of the SONOSFET were 23.5ns at erase state and 28.2ns at program state, respectively.

• Journal of the East Asian Society of Dietary Life
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• v.9 no.1
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• pp.3-16
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• 1999

Motivated by a need to provide the basic data of standard recipes for Korean traditional food, Mandoo, this paper explores a historic research about the development of Mandoo classified by Mandoo-crust, Mandoo-filling, spice & condiment, garnish, size & shape and unit for measuring ingredients. The data for this study are obtained from the major old cooking books published in the period 1670-1957, such as ${\ulcorner}Eumsikdimibang{\lrcorner},$ ${\ulcorner}Leejogoongjoungyoritonggo{\lrcorner},$ and so on. The results of this study show that (1) starch, buckwheat flour and flour were used as Mandoo-crust and egg was added in order to improve cohesion, (2) cooked pheasant and beef were used as Mandoo-filling, (3) ginger had been used more generally than garlic as spice & condiment and later red pepper powder was added and pine nut was also widly used, (4) pan-fried meat, egg, and mushroom were used as garnish, (5) Mandoo of different kinds existed and had various sizes and shapes, (6) unit for measuring ingredients began to appear on printing in 1939. These findings provide us with opportunity, which leads to making the standard recipes for Mandoo so that anyone can easily have resources for cooking the traditional food, Mandoo.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.11
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• pp.83-91
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• 1990

VOC(coltage controlled oscillator) circuits are necessary in applications such at the demodul-ation of FM signals, frequency synthesizer, and for clock recovery from digital data. In this paper, we designed the VCO circuit based on a OTA(operational transconductance amplifier) and the OP amp which using a differential amplifier by BiCMOS circuit. It consists of a OTA, voltage contorolled integrator and a schmitt trigger. Conventional VCO circuits are designed using the CMOS circuit, but in this paper we designed newly BiCMOS VCO circuit which has a good drive avlity, As a result of SPICE simulation, output frequency is 141KHz at 105KHz, and sensitivity is 15KHz.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.6
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• pp.11-21
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• 1997

The delay models for CMOS invertr presented so far predicted the delay time quite accurately whens input transition-time is very small. But the problem that the accuracy is inclined to decrease becomes apparent as input transition tiem increases. In this paper, a delay model for CMOS inverter is presented, which accuractely predicts the delay time even though input transition-time increases. To inverter must be included in modeling process because the main reason of inaccuracy as input transition tiem is the leakage current through the complementary MOS. For efficient modeling, this paper first models the MOSes with simple I-V charcteristic, with which both the pMOS and the nMOS are considered easily in calculating the inverter delay times. This resulting model needs few parameters and re-models each MOS effectively and simply evaluates output voltage to predict delay time, delay values obtained from this effectively and simply evaluates output voltage to predict delay time, delay values obtained from this model have been found to be within about 5% error rate of the SPICE results. The calculation time to predict the delay time with the model from this paper has the speed of more than 70times as fast as to the SPICE.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.7
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• pp.1048-1056
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• 2001

Decoupling capacitors are commonly used to reduce the effect of SSN propagated through parallel power and ground planes in high-speed multilayer printed circuit boards (PCBs). In this paper, we introduced a simple high frequency measurement and proposed a wideband (50 MHz ∼3 GHz) equivalent circuit model for decoupling capacitor considering high frequency parasitic effects. The proposed model can be easily combined with the SPICE model of power supply planes far SSN analysis. The circuit simulations with the proposed model show good agreement with the measurement results. Also, we expect to accurately analyze the noise reduction effect as a function of value and location using the proposed model of decoupling capacitor.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.3
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• pp.439-446
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• 1998

This paper presents design of SD adder and PD adder on Multi-Valued Logic. For implementing of Multi-valued logic circuits we use Current-mode CMOS circuits and also use Voltage-mode CMOS circuits partially. The proposed arithmetic circuits was estimated by SPICE simulation. At the SD(Signed-Digit) number presentation applying Multi-Valued logic the carry propagation is always limited to one position to the left this number presentation allows fast parallel operation. The addition method that add M operands using PD( positive digit number) is effective not only for the realization of the high-speed compact arithmetic circuit, but also for the reduction of the interconnection in the VLSI processor. therefor, if we use PD number representation, the high speed processor can be implementation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.463-466
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• 2000

According to the development of the semiconductor micro device technology, IC chip trends the high integrated, low power tendency. Nowadays, it can be showed the tendency of single chip in system level. But in the system level, IC operates by multi power supply voltages. So, semiconductor process is necessary for these multi power operation. Therefore, in this paper, dual gate high voltage device that operate by multi power supply of 5V and 20V fabricated in the 0.5${\mu}{\textrm}{m}$ CMOS process technology and its electrical characteristics were analyzed. The result showed that the characteristics of the 5V device almost met with the SPICE simulation, the SPICE parameters are the same as the single 5V device process. And the characteristics of 20V device showed that gate length 3um device was available without degradation. Its current was 520uA/um, 350uA/um for NMOS, PMOS and the breakdown voltages were 25V, 28V.