• Journal of Electrical Engineering and Technology
• /
• v.6 no.2
• /
• pp.215-225
• /
• 2011

In this paper, a buck DC-DC bridge converter is used as a power factor correction (PFC) converter for feeding a voltage source inverter (VSI) based permanent magnet brushless DC motor (PMBLDCM) drive. The front end of the PFC converter is a diode bridge rectifier (DBR) fed from single phase AC mains. The PMBLDCM is used to drive the compressor of an air conditioner through a three-phase voltage source inverter (VSI) fed from a variable voltage DC link. The speed of the air conditioner is controlled to conserve energy using a new concept of voltage control at a DC link proportional to the desired speed of the PMBLDC motor. Therefore, VSI operates only as an electronic commutator of the PMBLDCM. The current of the PMBLDCM is controlled by setting the reference voltage at the DC link as a ramp. The proposed PMBLDCM drive with voltage control-based PFC converter was designed and modeled. The performance is simulated in Matlab-Simulink environment for an air conditioner compressor load driven through a 3.75 kW, 1500 rpm PMBLDC motor. To validate the effectiveness of the proposed speed control scheme, the evaluation results demonstrate improved efficiency of the complete drive with the PFC feature in a wide range of speed and input AC voltage.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2014.04a
• /
• pp.625-629
• /
• 2014

For the purpose of the acoustic performance evaluation of noise reduction device(NRD) installed at the top of noise barrier for further decreasing of noise level of 400km/h class high-speed railroad(HEMU), the acoustic performance test method using speaker instead of really running railway vehicle was suggested in this paper. For this, noise source location and frequency spectrum of HEMU was analyzed through the field noise test. These data were used for the determination of speaker's installation positions and frequency correction values applied to the speaker noise source. And, 400 meters long NRD was installed at the site where HEMU will be running at a speed of 400km/h. Finally, the outdoor speaker test with and without NRD showed that this NRD could decrease noise level even more than 3dB(A). In the future, the acoustic performance results of NRD conducted with speaker test will be compared with that of field test for HEMU running at a speed of 400km/h.

• Journal of Biosystems Engineering
• /
• v.15 no.2
• /
• pp.110-122
• /
• 1990

This study was undertaken to develop the feed rate control system for the head feed thresher by making use of the microprocessor and to evaluate the response of the system to a various threshing conditions. The control unit was composed of one-board microcomputer. The speed of the wet-paddy feeding chain was controlled by dc moter with PI controller. It was used the adaptive control method to maintain the constant feed rate regardless of the fed rice varieties. The sliding type potentiometer was used as the feed rate sensor, which was attached on the sheaf-holding apparatus. The mathematical models of the system components were derived and computer simulation was developed for investigating the parameters affecting on control performance and for estimating the response of the system. A one-board microcomputer-based feed rate control system developed in this study was properly functioned and assessed as adequate for the feed rate control system of the head feed thresher. Based on the simulation for the bundle feed, it was anticipated that the lower setting value of the cylinder speed(RL) is to be set higher than the limiting operational speed. In addition, the higher setting value of the cylinder speed(RH) is to be set lower than the limiting cylinder speed for threshing. The computer simulation for the continuous spread feed showed that the lower the setting value of straw layer thickness(LL) was set, the shorter the correction time. However, if too low LL may be established, the feed rate could not reach to its desired rate.

• Journal of Korean Society for Atmospheric Environment
• /
• v.14 no.6
• /
• pp.607-620
• /
• 1998

The influence of transportation on air quality has been elevating in urban area. Air pollutants from automobiles cause primary and secondary air pollution, and need to be tightly controlled. In this study, the effect of automobile air pollutants on highway vicinity area was evaluated by the comparison of field measurement. and target was for modeling using CALINE3, NO2 was the target for this work. It was found that the concentration predicted by CALINE3 is overestimated at low wind speed and input data of wind speed requires correction. Based on the measured data, the wind speed was modified by effective wind speed equation [Ue=U+0.24·EXP(-pxU)], and there after the accuracy of CALINE3 calculation was improved neighborhood area of highway. It was also observed that weather conditions and traffic volume affect the concentration of air pollution. Finally, the NO2 effect of automobile air pollutants on the vicinity area of highway proved to be up to 400∼600m from the highway.

• New & Renewable Energy
• /
• v.9 no.1
• /
• pp.12-16
• /
• 2013

The nacelle anemometer mounted behind the blade roots of a wind turbine measures distorted wind speed comparable with free-stream wind because of the wake effects caused dependent upon the operation of the wind turbine and the rotation of its blades. The field campaign was carried out to measure free-stream wind speed at a height identical to the height of the nacelle anemometer by deploying a ground-based remote-sensing equipment, LIDAR. It is derived that a third-order polynomial equation for correcting wind speed measured by the nacelle anemometer to undistorted free-stream wind speed incident to a wind turbine. It is anticipated that the derived correction equation enables wind speed measured by the nacelle anemometer to be used as a precise input for a wind turbine performance test and for developing an active control logic.

• Journal of electromagnetic engineering and science
• /
• v.6 no.3
• /
• pp.147-154
• /
• 2006

In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de) interleaving and iterative decoding in a conventional maximum a posteriori(MAP) turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is come from the combination of the radix-4, dual-path processing, parallel decoding, and rearly-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit-error rate(BER) performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. Fixed on the parameters of N=212, iteration=3, 8-states, 3 iterations, and QPSK modulation scheme, we designed the adaptive high-speed turbo decoder using the Xilinx chip (VIRTEX2P (XC2VP30-5FG676)) with the speed of 17.78 Mb/s. From the results, we confirmed that the decoding speed of the proposed decoder is faster than conventional algorithms by 8 times.

• Journal of Power Electronics
• /
• v.15 no.3
• /
• pp.644-651
• /
• 2015

This paper introduces a novel digital one cycle control (DOCC) boost power factor correction (PFC) converter. The proposed PFC converter realizes the FPGA-based DOCC control approach for single-phase PFC rectifiers without input voltage sensing or a complicated two-loop compensation design. It can also achieve a high power factor and the operation of low harmonic input current ingredients over universal loads in continuous conduction mode. The trailing triangle modulation adopted in this approach makes the acquisition of the average input current an easy process. The controller implementation is based on a boost topology power circuit with low speed, low-resolution A/D converters, and economical FPGA development board. Experimental results demonstrate that the proposed PFC rectifier can obtain a PF value of up to 0.999 and a minimum THD of at least 1.9% using a 120W prototype.

• 제어로봇시스템학회:학술대회논문집
• /
• 2003.10a
• /
• pp.2126-2130
• /
• 2003

In the integrated systems, that is integrated digital TV(DTV) internet and home automation, like home server, is needed integration of digital TV video signal and computer graphic signal. The graphic signal is operating at the high speed and has time-divide-stream. So the re-request of data is not easy at the time of error detection. therefore EDAC algorithm is efficient. In this paper, we show a scheme, that is integration of graphic and dtv format signal for DTV monitor display. This paper also presents the efficiency error detection auto correction(EDAC) for conversion of graphics signal to DTV video signal. A presented EDAC algorithms use the modified hamming code for enhancing video quality and reliability. A EDAC algorithm of this paper can detect single error, double error, triple error and more error for preventing from incorrect correction. And it is not necessary an additional memory. In this paper The comparison between digital TV video signal and graphic signal, a EDAC algorithm and a design of conversion graphic signal to DTV signal with EDAC function in DTV system is described.

• Proceedings of the KOSOMBE Conference
• /
• v.1997 no.05
• /
• pp.342-344
• /
• 1997

Owing to technical advances in very large-scale integrated circuits (VLSI), high-speed digital signal processing (DSP) chips become fast enough to allow for real-time implementation of hearing aid algorithms in units small enough to be wearable. In this paper, we present a digital hearing aid processor (DHAP) chip built around a general-purpose 16-bit DSP core. The designed DHAP performs a nonlinear loudness correction of 8 octave frequency bands based on audiometric measurements. By employing a programmable DSP, the DHAP provides all the flexibility needed to implement audiological algorithms. In addition, the has a low power feature and $5.410\times5.720mm^2$ dimensions that fit for wearable devices.

• ETRI Journal
• /
• v.34 no.1
• /
• pp.138-141
• /
• 2012

This letter proposes a real-time digital image stabilization system for cell phone cameras without the need for frame memory. The system post-processes an image captured with a safe shutter speed using an adaptive denoising filter and a global color correction algorithm. This system can transfer the normal brightness of an image previewed under long exposure to the captured image making it bright and crisp with low noise. It is even possible to take photos in low-light conditions. By not needing frame memory, the approach is feasible for integration into the size-constrained image sensors of cell phone cameras.