• Title/Summary/Keyword: speed compensation

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Diminution of Current Measurement Error in Vector Controlled AC Motor Drives

  • Jung Han-Su;Kim Jang-Mok;Kim Cheul-U;Choi Cheol;Jung Tae-Uk
    • Journal of Power Electronics
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    • v.5 no.2
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    • pp.151-159
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    • 2005
  • The errors generated from current measurement paths are inevitable, and they can be divided into two categories: offset error and scaling error. The current data including these errors cause periodic speed ripples which are one and two times the stator electrical frequency respectively. Since these undesirable ripples bring about harmful influences to motor driving systems, a compensation algorithm must be introduced to the control algorithm of the motor drive. In this paper, a new compensation algorithm is proposed. The signal of the integrator output of the d-axis current regulator is chosen and processed to compensate for the current measurement errors. Usually the d-axis current command is zero or constant to acquire the maximum torque or unity power factor in the ac drive system, and the output of the d-axis current regulator is nearly zero or constant as well. If the stator currents include the offset and scaling errors, the respective motor speed produces a ripple related to one and two times the stator electrical frequency, and the signal of the integrator output of the d-axis current regulator also produces the ripple as the motor speed does. The compensation of the current measurement errors is easily implemented to smooth the signal of the integrator output of the d-axis current regulator by subtracting the DC offset value or rescaling the gain of the hall sensor. Therefore, the proposed algorithm has several features: the robustness in the variation of the mechanical parameters, the application of the steady and transient state, the ease of implementation, and less computation time. The MATLAB simulation and experimental results are shown in order to verify the validity of the proposed current compensating algorithm.

Improved Programmable LPF Flux Estimator with Synchronous Angular Speed Error Compensator for Sensorless Control of Induction Motors (유도 전동기 센서리스 제어를 위한 동기 각속도 오차 보상기를 갖는 향상된 Programmable LPF 자속 추정기)

  • Lee, Sang-Soo;Park, Byoung-Gun;Kim, Rae-Young;Hyun, Dong-Seok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.3
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    • pp.232-239
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    • 2013
  • This paper proposes an improved stator flux estimator through ensuring conventional PLPF to act as a pure integrator for sensorless control of induction motors. Conventional PLPF uses the estimated synchronous speed as a cut-off frequency and has the gain and phase compensators. The gain and phase compensators are determined on the assumption that the estimated synchronous angular speed is coincident with the real speed. Therefore, if the synchronous angular speed is not same as the real speed, the gain and phase compensation will not be appropriate. To overcome the problem of conventional PLPF, this paper analyzes the relationship between the synchronous speed error and the phase lag error of the stator flux. Based on the analysis, this paper proposes the synchronous speed error compensation scheme. To achieve a start-up without speed sensor, the current model is used as the stator flux estimator at the standstill. When the motor starts up, the current model should be switched into the voltage model. So a stable transition between the voltage model and the current model is required. This paper proposes the simple transition method which determines the initial values of the voltage model and the current model at the transition moment. The validity of the proposed schemes is proved through the simulation results and the experimental results.

Compensation of the rotor time constant of induction motor using current error feedback (전류오차 궤환을 이용한 유도전동기 회전자 시정수 보상)

  • 김승민;이무영;권우현
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.195-198
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    • 1997
  • This paper proposes the effective compensation method of the rotor time constant of induction motor. An indirect vector control method is highly dependent on the motor parameters. To solve the problem of performance degradation due to parameter variation in an indirect vector control of induction motor, we compensate the rotor time constant by current error feedback. The proposed method is a simple on-line rotor time constant compensation method using the information from terminal voltages and currents. As the current error, difference between current command and estimated current, approaches to zero, the value of rotor time constant in an indirect vector controller follows the real value of induction motor. This scheme is valid transient region as well as steady state region regardless of low or high speed. This method is verified by computer simulation. For this, we constructed the simulation model of induction motor, indirect vector controller and current regulated PWM (CRPWM) voltage source inverter (VSI) using SIMULINK in MATLAB.

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Implementation of the Burst Mode Fiber Optic Transmitter by Digital Temperature Compensation Architecture (디지털 온도보상에 의한 버스트 모드 광송신기의 구현)

  • Kang, Ho-Yong;Chai, Sang-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.8
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    • pp.12-17
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    • 2009
  • We have implement어 a bust mode optical transmitter using digital temperature compensation architecture with a microprocessor. Instead of previous analog real time technique, we used digital sampling and holding technique for the temperature compensation in order to get stable high speed data transmission of the laser diode. This digital temperature compensation technique should be complemented the previous analog method with accuracy and effectiveness in the over Gb/s transmitting application.

Learning Behavior of Virtual Robot using Compensation Signal (보상신호를 수반하는 가상로봇의 학습행위 연구)

  • Hwang, Su-Chul
    • 전자공학회논문지 IE
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    • v.44 no.3
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    • pp.35-41
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    • 2007
  • In this paper we suggest a model that the virtual robot based on artificial intelligence performs learning with compensation signals and compare the leaning speed of the virtual robot according to the compensation method after applying it to three type environments. As a result our model has showed that positive compensation is superior to hybrid one mixed positive and negative if there are enough time for learning in case of more or less complicated environment with the numerous foods, obstacles and robots. Otherwise hybrid method is better than positive one.

Chromatic Dispersion Monitoring of CSRZ Signal for Optimum Compensation Using Extracted Clock-Frequency Component

  • Kim, Sung-Man;Park, Jai-Young
    • ETRI Journal
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    • v.30 no.3
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    • pp.461-468
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    • 2008
  • This paper presents a chromatic dispersion monitoring technique using a clock-frequency component for carrier-suppressed return-to-zero (CSRZ) signal. The clock-frequency component is extracted by a clock-extraction (CE) process. To discover which CE methods are most efficient for dispersion monitoring, we evaluate the monitoring performance of each extracted clock signal. We also evaluate the monitoring ability to detect the optimum amount of dispersion compensation when optical nonlinearity exists, since it is more important in nonlinear transmission systems. We demonstrate efficient CE methods of CSRZ signal to monitor chromatic dispersion for optimum compensation in high-speed optical communication systems.

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A Design and Simulation of Hybrid Power Filter for ASD Loads Based on Instantaneous Power Compensation Theory (가변 속도 드라이버 부하에 대한 순시 전력 보상을 이용한 복합형 전력 필터의 설계와 시뮬레이션)

  • 조진호
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2000.04a
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    • pp.385-390
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    • 2000
  • This paper deals with the design and simulation of the hybrid power filter to compensate reactive power and harmonic components of nonlinear load. Control target is a 3-phase diode full bridge rectifier with L-R-C nonlinear load, this load is assumed adjustable speed driver(ASD). The hybrid filter consists of a shunt active filter, shunt passive filters and series inductors. Control algorithm is based on instantaneous power compensation theory proposed by H.Akagi and etc. The result from simulation shows the hybrid filter is superior than other filters on the point of compensation performance and low cost. The PSCAD/EMTDC 3.0 is used as simulation tools.

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A 10-bit D/A Converter with a Self Compensation Circuit (오차보정기능을 갖는 10비트 D/A 변환기)

  • Kim, Ook;Yang, Jung-Wook;Kim, Min-Kyu;Kim, Suk-Ki;Kim, Won-Chan
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.6
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    • pp.98-106
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    • 1994
  • To realize high accuracy and high speed we developed a new self compensation scheme and applied it to a 10-bit D/A converter. This circuit can compensate the device mismatch without interrupting the D/A converter operation. With the compensation circuit,INA decreased down to 0.22LSB from 0.47LSB. The device was fabricated using a 0.8$\mu$m CMOS process. The area of the D/A converter core is 3.2mm$^{2}$ and the area of the compensation part is 0.64mm$^{2}$.

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Multi-Stage CMOS OTA Frequency Compensation: Genetic algorithm approach

  • Mohammad Ali Bandari;Mohammad Bagher Tavakoli;Farbod Setoudeh;Massoud Dousti
    • ETRI Journal
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    • v.45 no.4
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    • pp.690-703
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    • 2023
  • Multistage amplifiers have become appropriate choices for high-speed electronics and data conversion. Because of the large number of high-impedance nodes, frequency compensation has become the biggest challenge in the design of multistage amplifiers. The new compensation technique in this study uses two differential stages to organize feedforward and feedback paths. Five Miller loops and a 500-pF load capacitor are driven by just two tiny compensating capacitors, each with a capacitance of less than 10 pF. The symbolic transfer function is calculated to estimate the circuit dynamics and HSPICE and TSMC 0.18 ㎛. CMOS technology is used to simulate the proposed five-stage amplifier. A straightforward iterative approach is also used to optimize the circuit parameters given a known cost function. According to simulation and mathematical results, the proposed structure has a DC gain of 190 dB, a gain bandwidth product of 15 MHz, a phase margin of 89°, and a power dissipation of 590 ㎼.