• Proceedings of the KOSOMBE Conference
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• v.1991 no.05
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• pp.39-42
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• 1991

Two types of speech signal processores (SSP) for cochlea prosthesis are designed. One is designed using cochlear model and the other is designed using Information (formant, pitch, intensity) extraction method. For these, cochlear model and acoustic information extraction method are proposed. The result shows SSP of cochlear model type contain more acoustic cues than that of information extraction type.

• Speech Sciences
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• v.9 no.3
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• pp.17-24
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• 2002

The goal of this research is the real-time implementation of an AEC (Acoustic Echo Canceller) using the floating-point digital signal processor of TMS320C31. We employ an FIR-type adaptive filter with the conventional NLMS (Normalized Least Mean Square) algorithm for the adaptation of filter coefficients. We program and optimize the system in the assembler level to make it run in real-time. With 8 kHz sampling rate, the implemented AEC requires $46\;\mu$sec and $77\;\mu$sec computational time per sample for 128-and 256-tap filter, respectively. It corresponds to 37% and 62% of maximum computational ability of TMS320C31 DSP.

• MALSORI
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• no.49
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• pp.145-158
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• 2004

This paper is aiming at implementation of real-time speaker verification system using DSP board. Dialog/4, which is based on microprocessor and DSP processor, is selected to easily control telephone signals and to process audio/voice signals. Speaker verification system performs signal processing and feature extraction after receiving voice and its ID. Then through computing the likelihood ratio of claimed speaker model to the background model, it makes real-time decision on acceptance or rejection. For the verification experiments, total 15 speaker models and 6 background models are adopted. The experimental results show that verification accuracy rates are 99.5% for using telephone speech-based speaker models.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.2
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• pp.51-58
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• 1993

This paper describes the development of a speaker-dependent isolated word recognizer as applied to voice dialing in a car noise environment. for this purpose, several methods to improve performance under such condition are evaluated using database collected in a small car moving at 100km/h The main features of the recognizer are as follow: The endpoint detection error can be reduced by using the magnitude of the signal which is inverse filtered by the AR model of the background noise, and it can be compensated by using variants of the DTW algorithm. To remove the noise, an autocorrelation subtraction method is used with the constraint that residual energy obtainable by linear predictive analysis should be positive. By using the noise rubust distance measure, distortion of the feature vector is minimized. The speech recognizer is implemented using the Motorola DSP56001(24-bit general purpose digital signal processor). The recognition database is composed of 50 Korean names spoken by 3 male speakers. The recognition error rate of the system is reduced to 4.3% using a single reference pattern for each word and 1.5% using 2 reference patterns for each word.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.5
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• pp.172-179
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• 1996

In the paper, QCELP (qualcomm code excited linear predictive), CDMA (code division multiple access)'s vocoder algorithm, was analyzed. And then, a ptich parameter seaarch architecture for 16-bit programmable DSP(digital signal processor) for QCELP was designed. Because we speed up the parameter search through high speed DSP using two MACs, we can satisfy speech codec specifiction for the digital celluar. Also, we implemented in FIFO(first-in first-out) memory using register file to increase the access time of data. This DSP was designed using COMPASS, ASIC design tool, by top-down design methodology. Therefore, it is possible to cope with rapid change at mobile communication market.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.11a
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• pp.173-176
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• 1999

Recently, speaker localizing estimation technique has been rising in teleconference systems. In this system, it is recognized speaker location using microphone array and camera is directed to speaker location automatically. In this paper, it was described to be able to enhance the speech qualify through microphone array, decrease computational loads using IIR filter as inverse filter, and confirmed to implement hardware using DSP processor.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.1
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• pp.101-113
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• 1986

In this paper, a real-time pitch detector LPC vocoder as implemented on a high speed digital signal processor, NEC 7720, is described. The pitch detector was based mainly on the SIFT algorithm. The SIFT pitch detector consists primarily of a digital low pass filter, inverse filter, computation of autocorrelation, a peak picker, interpolation, V/UV defcision and a final pitch smoother. In our approach, modification, mainly on the V/UV decision and a final pitch smoother, was made to estimate more accurate pitches. An 16-bit fixed-point aithmatic was employed for all necessary computation and the simulated results were compared with the eye detected pitches obtained from real speech data. The pitch detector occupies 98.8% of the instruction ROM, 37% of the data ROM, and 94% of internal RAM and takes 15.2ms to estimate a pitch when an analysis frame is consisted of 128 sampled speech data. It is observed that the tested results were well agreed with the computer simulation results.

• ETRI Journal
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• v.35 no.4
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• pp.697-705
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• 2013

Emerging trends in the area of digital very large scale integration (VLSI) signal processing can lead to a reduction in the cost of the cochlear implant. Digital signal processing algorithms are repetitively used in speech processors for filtering and encoding operations. The critical paths in these algorithms limit the performance of the speech processors. These algorithms must be transformed to accommodate processors designed to be high speed and have less area and low power. This can be realized by basing the design of the auditory filter banks for the processors on digital VLSI signal processing concepts. By applying a folding algorithm to the second-order digital gammatone filter (GTF), the number of multipliers is reduced from five to one and the number of adders is reduced from three to one, without changing the characteristics of the filter. Folded second-order filter sections are cascaded with three similar structures to realize the eighth-order digital GTF whose response is a close match to the human cochlea response. The silicon area is reduced from twenty to four multipliers and from twelve to four adders by using the folding architecture.

• Proceedings of the KSPS conference
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• 1996.10a
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• pp.432-434
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• 1996

The aim of this presentation is to show the structures and characteristics of English-Korean Machine Translator 'Trannie 96' 'Trannie 06' consists of five main engines and various types of dictionaries. With respect to the engines, the English sentences filtered by Pre-processor are tagged and parsed. After the conversion form English sentence structure to Korean one, 'Trannie 96' constructs Korean sentence. As for dictionaries, each engine has more than one optimized dictionaries. The algorithms employed by this machine is based on Linguistic theories, which make it possible for us to produce speedy and accurate translation.

• Proceedings of the KSPS conference
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• 2005.11a
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• pp.219-222
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• 2005

본 논문에서는 한국어 TSS 시스템을 위한 언어처리부의 설계 및 구현 과정을 설명한다. 구현된 언어처리부는 형태소 분석, 품사 태깅, 발음 변환 과정을 거쳐, 주어진 문장의 가장 적절한 발음열과 각 음소의 해당 품사를 출력한다. 프로그램은 표준 C언어로 구현되어 있고, Windows와 Linux에서 모두 동작되는 것을 확인하였다. 수동으로 품사가 할당된 4.5만 어절의 코퍼스로부터 형태소 사전을 구축하였으며, 모든 단어가 사전에 등록되어 있다고 가정할 경우, 488문장의 실험 자료에 대해 어절 단위 오류율이 3.25%이었다.