• Nuclear Engineering and Technology
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• v.41 no.1
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• pp.79-90
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• 2009

Verification of programmable logic controller (PLC) programs written in IEC 61131-3 function block diagram (FBD) is essential in the transition from the use of traditional relay-based analog systems to PLC-based digital systems. This paper describes effective use of the well-known verification tool VIS for automatic verification of behavioral equivalences between successive FBD revisions. We formally defined FBD semantics as a state-transition system, developed semantic-preserving translation rules from FBD to Verilog programs, implemented a software tool to support the process, and conducted a case study on a subset of FBDs for APR-1400 reactor protection system design.

• The Journal of Society for e-Business Studies
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• v.10 no.3
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• pp.49-65
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• 2005

This paper is a research on the dynamic signature verification of error rate which are false rejection rate and false acceptance rate, the size of signature verification engine, the size of the characteristic vectors of a signature, the ability to distinguish similar signatures, and so on. We suggest feature extraction and comparison method of the advanced signature verification. Also, we have implemented web authentication server with Java technology for supporting various OS Platforms and designed for more efficient user interfaces.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2002.10a
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• pp.616-619
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• 2002

The z-map structure is widely used for NC tool path verification as it is very simple and fast in calculation of Boolean operations. However, if the number of the x-y grid points in a z-map is increased to enhance its accuracy, the computation time for NC verification increases rapidly. To reduce this computation time, we proposed a NC verification method using 3-D graphic acceleration hardwares. In this method, the z-map of the resultant workpiece machined by a NC program is obtained by rendering tool swept volumes along tool pathos and reading the depth buffer of the graphic card. The experimental results show that this hardware-based method is faster than the conventional software-based method.

• Proceedings of the IEEK Conference
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• summer
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• pp.285-288
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• 2004

In this paper, we present a design and experiment of PCI Express core verification model. The model targeting Endpoint core based on Verilog HDL is designed by newly-emerging SystemC, which is a new C++ class library based system design approach. In the verification model, we designed and implemented a SystemC host system model which acted as Root Complex and device driver dedicated to the PCI Express Endpoint RTL core. The verification process is scheduled by scenarios which are implemented in host model. We show that the model is useful especially for verifying the RTL model which has dependencies on system software.

• Aerospace Engineering and Technology
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• v.6 no.2
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• pp.45-51
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• 2007

The various levels of test are performed to verify the correctness, completeness, and quality of the developed flight software. The three main test levels are unit test, integration test and verification test. The flight software unit test is performed on the individual PC environment using target simulator. And integration and verification test is mainly performed on STB(S/W Test Bed) which provides test and debugging environments for flight software on the target board This document is to present the test environment for the next generation low earth orbit satellite flight software development.

• Journal of KIISE:Software and Applications
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• v.34 no.3
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• pp.212-218
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• 2007

Not enough verification or enough design of test is not performing in many software developments organization as yet. Therefore, defects that can be detected and corrected during the beginning phases of development are usually found during dynamic testing, it is often observed that testing is inefficient compared to effort for testing. This study aims to suggest a method for effective testing through case study. It is useful in case of not verification and not enough design of test in the previous phase than coding. We show in a concrete way major activities that determine prioritization of testing and level of test case design through static testing, i.e. code review and analysis of code quality. And also we show role between test team and development team.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2022.06a
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• pp.88-90
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• 2022

For the quality management of software developed in Marine digital AtoN Information management and service system development project, an international standard-based quality process and a project management system-based communication and information sharing system were established. In addition, high-quality software development is achieved by monitoring the status of project output creation and supporting software quality inspection and verification.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.22 no.3
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• pp.310-315
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• 2021

In the case of weapon systems used by the military, defense standards are applied for economical and efficient procurement, management, and maintenance. Defense specifications are documents describing procedures and methods for determining whether technical requirements for products and services are consistent and apply to the production of weapon systems, quality assurance, and configuration management. Software is also subject to defense specifications, and is documented and managed in the same way as other defense specifications. Sometimes it happened to be standardized without some(or all) software. In this case, a competitive contract is impossible and it may affect the quality of weapon systems because the manufacturer arbitrarily changes the software without prior approval. So, software standardization is required, but it is very difficult to verify for firmware installed in hardware. This paper proposed a verification method for g software standardization, and we expect it will contribute to the efficient production and quality assurance of weapon systems.

• Journal of Advanced Navigation Technology
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• v.18 no.2
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• pp.191-199
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• 2014

Recently, researches to facilitate utilization by small and medium business (SMB) of cloud computing and big data paradigm, which is the booming adoption of IT area, has been on the increase. As one of these efforts, in this paper, we design and implement the prototype to tentatively build up Hadoop cluster under private cloud infrastructure environments. Prototype implementation are made on each hardware type such as single board, PC, and server and performance is measured. Also, we present the integrated verification results for the data analysis performance of the analysis software system running on top of realized prototypes by employing ASA (American Standard Association) Dataset. For this, we implement the analysis software system using several open sources such as R, Python, D3, and java and perform a test.

• Journal of Internet Computing and Services
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• v.8 no.6
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• pp.135-144
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• 2007

Feature models are widely used in domain engineering phase of software product lines development to model the common and variable concepts among products. From the feature model, the feature configurations are generated by selecting the features to be included in target product. The feature configuration represents the requirements for the specific product to be implemented. Although there are a lot of researches on how to build and use the feature models and feature configurations, the researches on the formal semantics and reasoning of them are rather inactive. This paper proposes the feature configuration verification approach based on JESS, java-based rule-base system. The Graph Product Line, a standard problem for evaluating the software product line technologies, is used throughout the paper to illustrate this approach. The approach in this paper has advantage of presenting the exact reason causing inconsistency in the feature configuration. In addition, this approach should be easily applied into other software product lines development environments because JESS system can be easily integrated with Java language.