• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.4
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• pp.335-342
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• 2000

A new control method for a single-phase active power filter, based on a load current estimation using a DC capacitor voltage of active power filter without sensing nonlinear load current, is proposed in this paper. Because the method proposed can remove the load current sensor in comparison with a conventional method sensing the load current and DC capacitor voltage together, it can make the active power filter easy installation, low cost, small size with no performance detriment. In addition, sample-hold technique and proportional control method is adopted to control the DC capacitor voltage and as no delay element such as LPF or PI control in the conventional method is used, the transient response is fast and good. Operation of a single-phase active power filter which consist of eight mode is explained according to utility voltage, compensation current and switch state, and compensation characteristics of active power filter using proposed method is verified by experiment.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.6
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• pp.539-546
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• 1999

A new integrated single-stage zero current switched(ZCS) quasi resonant convertedQRC) for the IX)wer f factor correction(PFCl converter is introduced in this paper. The power factor correction can be achieved by t the discontinuous conduction mod$\varepsilon$(DCM) operation of an input current. The proposed converter has the c characteristics of the good IX)wer factor, 10씨 line current harmonics, and tight output regulation. Furthern10re, t the ringing effect due to the output capacitance of the main switch can be eliminated by use of‘ active clamp c circuit. Therefore, the proIX)sed converter is expecttc'(] to be suitable for a compact power converter with a t tightly regulated output voltage requiring a switching frequency of more than several hundrtc'(]s kHz.

• Korean Journal of Optics and Photonics
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• v.31 no.1
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• pp.7-12
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• 2020

In this paper, we experimentally investigate the fiber fuse in single-mode 2-kW-class high-power fiber amplifiers, depending on the cooling method at the splicing point. We measured the temperature of the splicing point between the pump-signal combiner and gain fiber as a function of laser output power. The temperature of the splicing point increased from 20 to 32℃ with a slope of 0.01℃/W, up to 1.2 kW of laser output power. At higher powers the temperature of the splicing point increased dramatically, with a slope of 0.08℃/W. After that, the fiber amplifier was destroyed during operation at 1.96 kW of output power by fiber fuse. The bullet shape, a common feature of fiber fuse, was observed in the damaged passive fiber core of the pump-signal combiner. Later, we adopted an improved water-cooled cold plate to increase the cooling efficiency at the splicing point, and investigated the laser output power. The temperature at the splicing point was 35.8℃ with a temperature-rise slope of 0.007℃/W at the maximum output power of 2.05 kW. The beam quality M² was measured to be less than 1.3, and the output beam's profile was a stable Gaussian shape. Finally, neither fiber fuse nor mode instability was observed in the fiber amplifier at the maximum output power of 2.05 kW.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.11
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• pp.2093-2099
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• 2016

This paper describes a design of crypto-processor that supports multiple block cipher algorithms of PRESENT, ARIA, and AES. The crypto-processor integrates three cores that are PRmo (PRESENT with mode of operation), AR_AS (ARIA_AES), and AES-16b. The PRmo core implementing 64-bit block cipher PRESENT supports key length 80-bit and 128-bit, and four modes of operation including ECB, CBC, OFB, and CTR. The AR_AS core supporting key length 128-bit and 256-bit integrates two 128-bit block ciphers ARIA and AES into a single data-path by utilizing resource sharing technique. The AES-16b core supporting key length 128-bit implements AES with a reduced data-path of 16-bit for minimizing hardware. Each crypto-core contains its own on-the-fly key scheduler, and consecutive blocks of plaintext/ciphertext can be processed without reloading key. The crypto-processor was verified by FPGA implementation. The crypto-processor implemented with a $0.18{\mu}m$ CMOS cell library occupies 54,500 gate equivalents (GEs), and it can operate with 55 MHz clock frequency.

• Journal of Korean Society of Environmental Engineers
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• v.32 no.12
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• pp.1119-1125
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• 2010

Most of the sludge pre-treatment methods to improve the anaerobic digestibility of sludge are not practied in the fields with low economical efficiency. The venturi cavitation system (VCS) adopting hydrodynamic cavitation is simple and requires low energy. This research was conducted to investigate the optimum design and operating conditions of the VCS. The experimental results indicated that the optimum number of venturi in series was three, and the suction mode operation of the pump yielded 1.6 times higher pre-treatment efficiency per unit energy consumption than the discharge mode. The combination of venturies with different throat sizes did not affect the pre-treatment efficiency. Also, the parallel installation of the three in series venture unit yielded 30% higher pre-treatment efficiency per unit energy consumption than the single unit. Under parallel conditions, the solubilization efficiency was 5.6 mg ${\Delta}SCOD/g$ TS/kWh, which is higher than the previously reported value.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.17-23
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• 2008

We have investigated the properties of the novel rectangular ring lasers containing active and passive regions in a InP material system. The rectangular ring laser consists of four low loss total internal reflection mirrors and a directional coupler made out of passive three waveguide. Two different lasers haying active lengths of 250 and $350{\mu}m$ and total cavity lengths of 580 and $780{\mu}m$ are fabricated, respectively. For both devices lasing thresholds of 38 mA is obtained at room temperature and under continuous wave operation. Lasing is predominantly single mode with the side mode suppression ratio better than 20 dB.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.9
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• pp.666-672
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• 2003

In this paper, we described the fabrication and the performance of wavelength tunable distributed bragg reflector (DBR) laser diode (LD), having different waveguide coupling mechanisms; integrated-twin-guide (ITG) DBR-LD and butt coupled (BT) DBR-LD. This deviceis fabricated by metal organic vapor phase epitaxy (MOVPE) growth and planar buried heterostructure (PBH)-type transverse current confinement structure. The result of measurement, the optical performance of BT-DBR-LD is better over 2 times than that of ITG-DBR-LD at the variation of threshold current and output power, and slop efficiency due to the higher coupling efficiency of the butt coupled structure than the integrated twin guide structure. The maximum wavelength tuning range is about 7.2nm for ITG DBR-LD and 7.4nm for BT DBR-LD. Both types of lasers have a very high yield of single mode operation with a side-mode suppression ratio of more than 35dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.10
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• pp.761-768
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• 2017

In this paper, to implement the electromagnetic wave environment and solve electromagnetic compatibility(EMC) problem, miniaturization of ultra-wide band log periodic dipole antenna for measurement was investigated. In addition, in oder to improve the signal-to-noise ratio in high frequency band, balun was connected to the antenna to stabilize the operation of the differential mode antenna and the single mode coaxial cable. To minimize the total size and to increase bandwidth of the antenna, a fat dipole structure was used for the resonance frequency band below 4 GHz and a general dipole shape was used for that above 4 GHz. The bandwidth of the proposed antenna was represented from 0.6 GHz to 8.0 GHz with a ratio bandwidth of 12.3 : 1. Measured peak gain varies from 5.7 dBi to 9.1 dBi, and a half power beamwidth was presented from $29.4^{\circ}$ to $100.2^{\circ}$ in operating range.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.2B no.3
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• pp.115-124
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• 2002

This paper presents an active auxiliary edge-resonant DC link snubber with a ringing surge damper and a three-phase voltage source type zero voltage soft-switching inverter with the resonat snubber treated here for the AC servo motor driver applications. The operation of the active auxiliary edge-resonant DC link snubber circuit with PWM voltage is described, together with the practical design method to select its circuit parameters. The three-phase voltage source type soft-switching inverter with a single edge-resonant DC link snubber treated here is evaluated and discussed for the small-scale permanent magnet (PM) type-AC servo motor driver from an experimental point of view. In addition to these, the AC motor stator current and its motor speed response for the proposed three-phase soft-switching inverter employing Intelligent Power Module(IPM) based on IGBTS are compared with those of the conventional three-phase hard-switching inverter using IPM. The practical effectiveness of the three-phase soft-switching inverter-fed permanent magnet type AC motor speed tracking servo driver is proven on the basis of the common mode current in a novel type three-phase soft-switching inverter-fed AC motor side and the conductive noise on the mains terminal interface voltage as compared with those of the conventional three-phase hard-switching inverter-fed permanent magnet type AC servo motor driver for the speed tracking applications.

• Journal of Power Electronics
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• v.16 no.6
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• pp.1991-2004
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• 2016

An LC filter is required to reduce the output current ripple in the auxiliary resonant snubber inverter (ARSI) for high-performance applications. However, if the traditional control method is used in the ARSI with LC filter, then unnecessary current flows in the auxiliary circuit. In addressing this problem, a novel load-adaptive control that fully uses the filter inductor current ripple to realize the soft-switching of the main switches is proposed. Compared with the traditional control implemented in the ARSI with LC filter, the proposed control can reduce the required auxiliary current, contributing to higher efficiency and DC-link voltage utilization. In this study, the detailed circuit operation in the light load mode (LLM) and the heavy load mode (HLM) considering the inductor current ripple is described. The characteristics of the improved ARSI are expressed mathematically. A prototype with 200 kHz switching frequency, 80 V DC voltage, and 8 A maximum output current was developed to verify the effectiveness of the improved ARSI. The proposed ARSI was found to successfully operate in the LLM and HLM, achieving zero-voltage switching (ZVS) of the main switches and zero-current switching (ZCS) of the auxiliary switches from zero load to full load. The DC-link voltage utilization of the proposed control is 0.758, which is 0.022 higher than that of the traditional control. The peak efficiency is 91.75% at 8 A output current for the proposed control, higher than 89.73% for the traditional control. Meanwhile, the carrier harmonics is reduced from -44 dB to -66 dB through the addition of the LC filter.