• Title/Summary/Keyword: single pass algorithm

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Fast Detection Algorithm for Voltage Sags and Swells Based on Delta Square Operation for a Single-Phase Inverter System

  • Lee, Woo-Cheol;Sung, Kook-Nam;Lee, Taeck-Kie
    • Journal of Electrical Engineering and Technology
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    • v.11 no.1
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    • pp.157-166
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    • 2016
  • In this paper, a new sag and peak voltage detector is proposed for a single-phase inverter using delta square operation. The conventional sag detector is from a single-phase digital phase-locked loop (DPLL) that is based on d-q transformations using an all-pass filter (APF). The d-q transformation is typically used in the three-phase coordinate system. The APF generates a virtual q-axis voltage component with a 90° phase delay, but this virtual phase cannot reflect a sudden change in the grid voltage at the instant the voltage sag occurs. As a result, the peak value is drastically distorted, and it settles down slowly. A modified APF generates the virtual q-axis voltage component from the difference between the current and the previous values of the d-axis voltage component in the stationary reference frame. However, the modified APF cannot detect the voltage sag and peak value when the sag occurs around the zero crossing points such as 0° and 180°, because the difference voltage is not sufficient to detect the voltage sag. The proposed algorithm detects the sag voltage through all regions including the zero crossing voltage. Moreover, the exact voltage drop can be acquired by calculating the q-axis component that is proportional to the d-axis component. To verify the feasibility of the proposed system, the conventional and proposed methods are compared using simulations and experimental results.

An Image Compression Algorithm Using the WDCT (Warped Discrete Cosine Transform) (WDCT(Warped Discrete Cosine Transform)를 이용한 영상 압축 알고리듬)

    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.12B
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    • pp.2407-2414
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    • 1999
  • This paper introduces the concept of warped discrete cosine transform (WDCT) and an image compression algorithm based on the WDCT. The proposed WDCT is a cascade connection of a conventional DCT and all-pass filters whose parameters can be adjusted to provide frequency warping. In the proposed image compression scheme, the frequency response of the all-pass filter is controlled by a set of parameters with each parameter for a specified frequency range. For each image block, the best parameter is chosen from the set and is sent to the decoder as a side information along with the result of corresponding WDCT computation. For actual implementation, the combination of the all-pass IIR filters and the DCT can be viewed as a cascade of a warping matrix and the DCT matrix, or as a filter bank which is obtained by warping the frequency response of the DCT filter bank. Hence, the WDCT can be implemented by a single matrix computation like the DCT. The WDCT based compression, outperforms the DCT based compression, for high bit rate applications and for images with high frequency components.

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A Study on an Effective Event Detection Method for Event-Focused News Summarization (사건중심 뉴스기사 자동요약을 위한 사건탐지 기법에 관한 연구)

  • Chung, Young-Mee;Kim, Yong-Kwang
    • Journal of the Korean Society for information Management
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    • v.25 no.4
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    • pp.227-243
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    • 2008
  • This study investigates an event detection method with the aim of generating an event-focused news summary from a set of news articles on a certain event using a multi-document summarization technique. The event detection method first classifies news articles into the event related topic categories by employing a SVM classifier and then creates event clusters containing news articles on an event by a modified single pass clustering algorithm. The clustering algorithm applies a time penalty function as well as cluster partitioning to enhance the clustering performance. It was found that the event detection method proposed in this study showed a satisfactory performance in terms of both the F-measure and the detection cost.

Single-Phase Hybrid Active Power Filter Using Rotating Reference Frame (회전좌표계를 이용한 단상 하이브리드형 능동 전력필터)

  • Kim Jin-Sun;Kim Young-Seok
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.54 no.8
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    • pp.377-386
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    • 2005
  • This paper presents the control algorithm of single-phase hybrid active power filter for the compensation of harmonic current components in nonlinear R-L load with passive active Power filters. To construct two phase system, an imaginary second phase was made. In this proposed method, the new signal which is the delayed through the filtering by the phase-delay property of low-pass filter is used as the secondary phase. Because two-phases have the different phase, the instantaneous calculation of harmonic current is possible. In this paper, a reference voltage is created by multiplying the coefficient k by the compensation current using the rotating reference frame synchronized with the source-frequency, not applying to instantaneous reactive power theory which has been used with the existing fixed reference frames In order to verify the validities of the proposed control methods, experiments are carried out with the prototypes of single-phase hybrid active power filter.

An Efficient FPGA based Real-Time Implementation Shunt Active Power Filter for Current Harmonic Elimination and Reactive Power Compensation

  • Charles, S.;Vivekanandan, C.
    • Journal of Electrical Engineering and Technology
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    • v.10 no.4
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    • pp.1655-1666
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    • 2015
  • This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

Moon Phase based Threshold Determination for VIIRS Boat Detection

  • Kim, Euihyun;Kim, Sang-Wan;Jung, Hahn Chul;Ryu, Joo-Hyung
    • Korean Journal of Remote Sensing
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    • v.37 no.1
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    • pp.69-84
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    • 2021
  • Awareness of boats is a main issue in areas of fishery management, illegal fishing, and maritime traffic, etc. For the awareness, Automatic Identification System (AIS) and Vessel-Pass System (V-PASS) have been widely used to collect the boat-related information. However, only using these systems makes it difficult to collect the accurate information. Recently, satellite-based data has been increasingly used as a cooperative system. In 2015, U.S. National Oceanic and Atmospheric Administration (NOAA) developed a boat detection algorithm using Visible Infrared Imaging Radiometer Suite (VIIRS) Day & Night Band (DNB) data. Although the detections have been widely utilized in many publications, it is difficult to estimate the night-time fishing boats immediately. Particularly, it is difficult to estimate the threshold due to the lunar irradiation effect. This effect must be corrected to apply a single specific threshold. In this study, the moon phase was considered as the main frequency of this effect. Considering the moon phase, relational expressions are derived and then used as offsets for relative correction. After the correction, it shows a significant reduction in the standard deviation of the threshold compared to the threshold of NOAA. Through the correction, this study can set a constant threshold every day without determination of different thresholds. In conclusion, this study can achieve the detection applying the single specific threshold regardless of the moon phase.

Research on Discontinuous Pulse Width Modulation Algorithm for Single-phase Voltage Source Rectifier

  • Yang, Xi-Jun;Qu, Hao;Tang, Hou-Jun;Yao, Chen;Zhang, Ning-Yun;Blaabjerg, Frede
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.4
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    • pp.433-445
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    • 2014
  • Single phase voltage source converter (VSC) is an important power electronic converter (PEC), including single-phase voltage source inverter (VSI), single-phase voltage source rectifier (VSR), single-phase active power filter (APF) and single-phase grid-connection inverter (GCI). As the fundamental part of large scale PECs, single-phase VSC has a wide range of applications. In the paper, as first, on the basis of the concept of the discontinuous pulse-width modulation (DPWM) for three-phase VSC, a new DPWM of single-phase VSR is presented by means of zero-sequence component injection. Then, the transformation from stationary frame (abc) to rotating frame (dq) is designed after reconstructing the other orthogonal current by means of one order all-pass filter. Finally, the presented DPWM based single-phase VSR is established analyzed and simulated by means of MATLAB/SIMULINK. In addition, the DPWMs presented by D. Grahame Holmes and Thomas Lipo are discussed and simulated in brief. Obviously, the presented DPWM can also be used for single-phase VSI, GCI and APF. The simulation results show the validation of the above modulation algorithm, and the DPWM based single-phase VSR has reduced power loss and increased efficiency.

A study on the Vision Inspection System for Injection Molding Products (사출제품의 영상검사 시스템 개발에 관한 연구)

  • Shin, Jae-Heung;Kim, Hong-Ryul;Lee, Sang-Cheol;Moon, Sung-Chang
    • Proceedings of the KIEE Conference
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    • 2007.11c
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    • pp.112-116
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    • 2007
  • If any of the set parameters such as the environment temperature, mold temperature are not maintained at a consistent level, the fail rate of injection molding products is increased. The price of the injection molding machine is very high, so in order to maximize the utilization of the machine that is required the production of a number of different products with minimum fail rate using a single machine. To prevent the defect products by an inspection process with perfect quality is very important to minimizing production of defect products in the molding process. Vision inspection systems are widely utilized in various manufacturing industries for quality assurance purposes. The vision inspection system consists of CCD camera and lighting system to capture the image of the subject of inspection, an image comparison algorithm using to determine the pass/fail of the products, and mechanical devices for the operation of the whole system. This research focuses on the development of the vision inspection system to process the inspection of an automobile parts. We developed a mechanical devices for the inspection of the injection molding products and an image comparison algorithm to determine the pass/fail result of the inspection based on the molding image and the accepted product image.

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A New Control Method of Series Single-Phase Hybrid Active Power Filter (직렬형 단상 하이브리드 능동 전력필터의 새로운 제어법)

  • Kim, Jin-Sun;Kim, Young-Seok
    • Proceedings of the KIEE Conference
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    • 2005.04a
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    • pp.149-151
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    • 2005
  • This paper deals with the novel control algorithm of single-phase hybrid active power filter for the compensation of harmonic current components in nonlinear R-L load with passive active power filters. To construct two-axes coordinate, an imaginary second phase was made by giving time delay to line current. In this proposed method, the new signal, which was the delayed through the filtering by the phase-delay property of low-pass filter, is used as the secondary phase. Because two phases have different phase, instantaneous calculation of harmonic current is possible. In this paper, a reference voltage is created by multiplying gain of filter by compensation current using the rotating reference frames that synchronizes with source-frequency, not applying to instantaneous reactive power theory which has been used with the existing fixed reference frames. This paper shows the experimental results, which provide a high accuracy and extremely fast response of single-phase hybrid active Bower filter under the operation with the proposed control method.

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A Pacemaker AutoSense Algorithm with Dual Thresholds

  • Kim, Jung-Kuk;Huh, Woong
    • Journal of Biomedical Engineering Research
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    • v.23 no.6
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    • pp.477-484
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    • 2002
  • A pacemaker autosense algorithm with dual thresholds. one for noise or tachyarrhythmia detection (noise threshold, NT) and the other for intrinsic beat detection (sensing threshold. ST), was developed to improve the sensing performance in single pass VDD electrograms. unipolar electrograms, or atrial fibrillation detection. When a deflection in an electrogram exceeds the NT (defined as 50% of 57), the autosense algorithm with dual thresholds checks if the deflection also exceeds the ST. If it does, the autosense algorithm calculates the signal to noise ratio (SNR) of the deflection to the highest deflection detected by NT but lower than ST during the last cardiac cycle. If the SNR 2, the autosense algorithm declares an intrinsic beat detection and calculates the next ST based on the three most recent intrinsic peaks. If the SNR $\geq$2, the autosense algorithm checks the number of deflections detected by NT during the last cardiac cycle in order to determine if it is a noise detection or tachyarrhythmia detection. Usually the autosense algorithm tries to set the 57 at 37.5% of the average of the three intrinsic beats, although it changes the percentage according to event classifications. The autosense algorithm was tested through computer simulation of atrial electrograms from 5 patients obtained during EP study, to simulate a worst sensing situation. The result showed that the ST levels for autosense algorithm tracked the electrogram amplitudes properly, providing more noise immunity whenever necessary. Also, the autosense algorithm with dual thresholds achieved sensing performance as good as the conventional fixed sensitivity method that was optimized retrospectively.