• Title/Summary/Keyword: single clock

Search Result 244, Processing Time 0.02 seconds

Performance Analysis of Slave-Side Arbitration Schemes for the Multi-Layer AHB BusMatrix (ML-AHB 버스 매트릭스를 위한 슬레이브 중심 중재 방식의 성능 분석)

  • Hwang, Soo-Yun;Park, Hyeong-Jun;Jhang, Kyoung-Son
    • Journal of KIISE:Computer Systems and Theory
    • /
    • v.34 no.5_6
    • /
    • pp.257-266
    • /
    • 2007
  • In On-Chip bus, the arbitration scheme is one of the critical factors that decide the overall system performance. The arbitration scheme used in traditional shared bus is the master-side arbitration based on the request and grant signals between multiple masters and single arbiter. In the case of the master-side arbitration, only one master and one slave can transfer the data at a time. Therefore the throughput of total bus system and the utilization of resources are decreased in the master-side arbitration. However in the slave-side arbitration, there is an arbiter at each slave port and the master just starts a transaction and waits for the slave response to proceed to the next transfer. Thus, the unit of arbitration can be a transaction or a transfer. Besides the throughput of total bus system and the utilization of resources are increased since the multiple masters can simultaneously perform transfers with independent slaves. In this paper, we implement and analyze the arbitration schemes for the Multi-Layer AHB BusMatrix based on the slave-side arbitration. We implement the slave-side arbitration schemes based on fixed priority, round robin and dynamic priority and accomplish the performance simulation to compare and analyze the performance of each arbitration scheme according to the characteristics of the master and slave. With the performance simulation, we observed that when there are few masters on critical path in a bus system, the arbitration scheme based on dynamic priority shows the maximum performance and in other cases, the arbitration scheme based on round robin shows the highest performance. In addition, the arbitration scheme with transaction based multiplexing shows higher performance than the same arbitration scheme with single transfer based switching in an application with frequent accesses to the long latency devices or memories such as SDRAM. The improvements of the arbitration scheme with transaction based multiplexing are 26%, 42% and 51%, respectively when the latency times of SDRAM are 1, 2 and 3 clock cycles.

An Area-Efficient Time-Shared 10b DAC for AMOLED Column Driver IC Applications (AMOLED 컬럼 구동회로 응용을 위한 시분할 기법 기반의 면적 효율적인 10b DAC)

  • Kim, Won-Kang;An, Tai-Ji;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.53 no.5
    • /
    • pp.87-97
    • /
    • 2016
  • This work proposes a time-shared 10b DAC based on a two-step resistor string to minimize the effective area of a DAC channel for driving each AMOLED display column. The proposed DAC shows a lower effective DAC area per unit column driver and a faster conversion speed than the conventional DACs by employing a time-shared DEMUX and a ROM-based two-step decoder of 6b and 4b in the first and second resistor string. In the second-stage 4b floating resistor string, a simple current source rather than a unity-gain buffer decreases the loading effect and chip area of a DAC channel and eliminates offset mismatch between channels caused by buffer amplifiers. The proposed 1-to-24 DEMUX enables a single DAC channel to drive 24 columns sequentially with a single-phase clock and a 5b binary counter. A 0.9pF sampling capacitor and a small-sized source follower in the input stage of each column-driving buffer amplifier decrease the effect due to channel charge injection and improve the output settling accuracy of the buffer amplifier while using the top-plate sampling scheme in the proposed DAC. The proposed DAC in a $0.18{\mu}m$ CMOS shows a signal settling time of 62.5ns during code transitions from '$000_{16}$' to '$3FF_{16}$'. The prototype DAC occupies a unit channel area of $0.058mm^2$ and an effective unit channel area of $0.002mm^2$ while consuming 6.08mW with analog and digital power supplies of 3.3V and 1.8V, respectively.

The Relationship Between High School Teachers Health Perception and Health Promotion Behavior (고등학교 교사의 건강지각과 건강증진행위의 관계)

  • Kim, Dong-Hwan;Park, Young-Soo
    • The Journal of Korean Society for School & Community Health Education
    • /
    • v.4
    • /
    • pp.21-41
    • /
    • 2003
  • The purposes of this study were to ; first, investigate High School Teachers health promotion behavior types; second, explore the effects High School Teachers perceived benefits and perceived barriers have on their health promotion behavior ; third, suggest a desirable course that will increase teachers health. To this end, this researcher conducted a survey on health promotion behavior, perceived benefits, and perceived barriers to 329 High School teachers working in Goyang-si, Gyonggi-do. The results of the survey are as follows: Health Promotion Behavior A closer look at high school teachers health promotion behavior shows that male teachers, compared with female teachers, more actively promote their health. However, female teachers are more aware of their personal hygiene and disease risks. Older teachers, rather than younger teachers, are more willing to promote their health through better eating habits and more frequent exercise. A comparison between married and single teachers revealed that married teachers promote their health through better eating habits, and single teachers receive less stress and are better at managing their stress. Teachers working in technical high schools are better at managing their stress and personal hygiene than academic high schools teachers. Teachers working after 8 o'clock show better health promotion behavior through proper eating habits, stress management, regular exercise, disease prevention: however, teachers working before 7:30 are poor at managing their stress. Teachers not teaching supplementary lessons and not supervising night self-study are better at managing their stress, exercise schedule, and disease prevention than teachers who are. Perceived Benefits, Perceived Barriers, and Health Promotion Behavior A Comparison between male and female teachers shows that female teachers firmly believe improved eating habits and regular exercises would greatly enhance their health. However, female teachers felt more discomfort in their working environment and in utilizing medical institutes. Teachers in the 20s and 40s perceived health benefits through regular lifestyle and exercise. Teachers with less experience feel more pressure from their work environment. Teachers below their 30s feel more dissatisfaction towards using medical facilities. Teachers working in Technical High Schools are more aware of promoting their health through regular health checkups, exercise, and lifestyle ; however, teachers from Academic High Schools feel more pressure from their work environment. Teachers not performing supplementary lessons and supervising night self-study sessions are more willing to go through regular health checkups than those performing them. Also, teachers with supplementary lessons and night self-study supervisions claimed lack of leisure time, pressure from work environment, and inconvenience in using medical facilities a deterrent to promoting their health behavior. The Relationship between Health Promotion Behavior, Perceived Benefits, and Perceived Barriers The correlation ratio between Health Promotion Behavior and Perceived Benefits shows a positive relationship. The results show that High School teachers believed regular health checkups are necessary in maintaining their health. This research shows that teachers consider the following factors important in the order shown ; regular lifestyle and exercise, prevention of geriatric diseases, improving ones eating habits. In short, teachers who are more aware of the importance of regular health checkups are also more aware of the importance of promoting their health. The correlation ratio between Health Promotion Behavior and Perceived Barriers shows negative relationship. High School Teachers believe that lack of leisure activity, pressure from work environment, familys financial burden, fear of diseases, inconvenience in using medical facilities are a deterrent in promoting their health behavior. In other words, teachers with less leisure time and negative pressures from their work environment were less active in promoting their health behavior. This study shows that High School teachers will be able to promote their health behavior by maintaining regular health checkups, lifestyle, exercise, and preventing geriatric diseases. However, teachers believed that insufficient leisure time and negative pressure from their work environment acted as a deterrent to maintaining their health behavior. Most High School teachers believe they are at present healthy, and they were actively engaged in Preventative Health Promotion. The result of this study demonstrates that External factors have a large impact on teachers, which in turn acts negatively on their Health Promotion Behavior. In order to guarantee teachers health promotion behavior, systematic health checkups and increased leisure time, improvement in their work environment are necessary. Teachers also need to take a more active interest in their health.

  • PDF

A 10b 25MS/s $0.8mm^2$ 4.8mW 0.13um CMOS ADC for Digital Multimedia Broadcasting applications (DMB 응용을 위한 10b 25MS/s $0.8mm^2$ 4.8mW 0.13um CMOS A/D 변환기)

  • Cho, Young-Jae;Kim, Yong-Woo;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.43 no.11 s.353
    • /
    • pp.37-47
    • /
    • 2006
  • This work proposes a 10b 25MS/s $0.8mm^2$ 4.8mW 0.13um CMOS A/D Converter (ADC) for high-performance wireless communication systems such as DVB, DAB and DMB simultaneously requiring low voltage, low power, and small area. A two-stage pipeline architecture minimizes the overall chip area and power dissipation of the proposed ADC at the target resolution and sampling rate while switched-bias power reduction techniques reduce the power consumption of analog amplifiers. A low-power sample-and-hold amplifier maintains 10b resolution for input frequencies up to 60MHz based on a single-stage amplifier and nominal CMOS sampling switches using low threshold-voltage transistors. A signal insensitive 3-D fully symmetric layout reduces the capacitor and device mismatch of a multiplying D/A converter while low-noise reference currents and voltages are implemented on chip with optional off-chip voltage references. The employed down-sampling clock signal selects the sampling rate of 25MS/s or 10MS/s with a reduced power depending on applications. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.42LSB and 0.91LSB and shows a maximum SNDR and SFDR of 56dB and 65dB at all sampling frequencies up to 2SMS/s, respectively. The ADC with an active die area if $0.8mm^2$ consumes 4.8mW at 25MS/s and 2.4mW at 10MS/s at a 1.2V supply.