• Proceedings of the Korean Institute of Navigation and Port Research Conference
• /
• v.29 no.1
• /
• pp.47-53
• /
• 2005

This paper presents the method for developing an optimum hull form with minimum wave resistance using SQP(sequential quadratic programming) as an optimization technique. The wave resistance is evaluated by a Rankine source panel method with non-linear free surface conditions and the ITTC 1957 friction line is used to predict the frictional resistance coefficient. The geometry of the hull surface is represented and modified using NURBS(Non-Uniform Rational B-Spline) surface patches. To verity the validity of the developed program the numerical calculations for Wigley hull and Series 60(C${_B}$=0.6) hull had been performed and the results obtained after the numerical calculations had been compared with the original hulls.

• Journal of Convergence for Information Technology
• /
• v.11 no.7
• /
• pp.104-110
• /
• 2021

A novel selective oxidation process has been developed for low source/drain (S/D) series resistance of the fin channel metal oxide semiconductor field effect transistor (MOSFET). Using this technique, the selective oxidation fin-channel MOSFET (SoxFET) has the gate-all-around structure and gradually enhanced S/D extension regions. The SoxFET demonstrated over 70% reduction in S/D series resistance compared to the control device. Moreover, it was found that the SoxFET behaved better in performance, not only a higher drive current but also higher transconductances with suppressing subthreshold swing and drain induced barrier lowering (DIBL) characteristics, than the control device. The saturation current, threshold voltage, peak linear transconductance, peak saturation transconductance, subthreshold swing, and DIBL for the fabricated SoxFET are 305 ㎂/㎛, 0.33 V, 13.5 𝜇S, 76.4 𝜇S, 78 mV/dec, and 62 mV/V, respectively.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.12 no.5
• /
• pp.372-377
• /
• 2007

This paper proposes a novel fault diagnosis method of a electrolytic capacitor used for DC-link voltage smoothing in adjustable speed drives. The equivalent series resistance (ESR) of the electrolytic capacitor is directly estimated from DC-link voltage and load currents and the status of the electrolytic capacitor is determined from the estimated ESR. To compensate the variation of the ESR owing to temperature variation, diodes are located on the same PCB near the capacitor and the temperature of the capacitor is sensed indirectly from the voltage drop of diodes. Simulation and experimental studies show the effectiveness of the proposed method.

• Journal of Welding and Joining
• /
• v.12 no.4
• /
• pp.127-140
• /
• 1994

Resistance spot welding has been widely used in the sheet metal joining processes because of its high productivity and convenience. In the resistance spot welding processes the size of molten nugget is a criterion to assess weld quality. Many research have founded on measuring weld nugget size at the same time monitoring welding process parameters such as dynamic resistance and electrode movement. With increasing demand of energy saving, many efforts were made to employ aluminum alloys that are lighter than steel and have relatively equivalent strength to steel in the automobile industry. In this paper, spot weldability of aluminum alloys for various welding conditions were examined by series of experiments. One of the 6000 series (Mg-Si) aluminum alloy, 6383-T4 was chosen, which is currently considered as a substitute for the galvanized steel. Dynamic resistance, electrode movement and corresponding nugget size were observed and compared to the case of steel. Finally, resistance spot welding of dissimilar material (galvanized steel-aluminum alloy) was attempted.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.24 no.11
• /
• pp.1098-1103
• /
• 2013

A low-noise amplifier(LNA) using series RLC matching network and resistive feedback at 8 GHz is presented. Inductive degeneration is used for the input matching with which the proposed LNA shows quite a wide bandwidth in terms of $S_{21}$. An equivalent circuit model is deduced for input matching by conversion from parallel circuit to series resonant circuit. By exploiting the resistive feedback and series RLC input matching, fully integrated LNA achieves maximum $S_{21}$ of 8.5 dB(peak to -3 dB bandwidth is about 3.5 GHz) noise figure of 5.9 dB, and IIP3 of 1.6 dBm while consuming 7 mA from 1.2 V supply.

• New & Renewable Energy
• /
• v.4 no.2
• /
• pp.74-80
• /
• 2008

To improve the blue responses of screen-printed single crystalline silicon solar cells, we investigated an emitter etch-back technique to obtain high emitter sheet resistances, where the defective dead layer on the emitter surface was etched and became thinner as the etch-back time increased, resulting in the monotonous increase of short circuit current and open circuit voltage. We found that an optimal etch-back time should be determined to achieve the maximal performance enhancement because of fill factor decrease due to a series resistance increment mainly affected by contact and lateral resistance in this case. To elucidate the reason for the fill factor decrease, we studied the resistance analysis by potential mapping to determine the contact and the lateral series resistance. As a result, we found that the fill factor decrease was attributed to the relatively fast increase of contact resistance due to the dead layer thinning down with the lowest contact resistivity when the emitter was contacted with screen-printed silver electrode.

• 한국신재생에너지학회:학술대회논문집
• /
• 2008.05a
• /
• pp.390-393
• /
• 2008

To improve the blue responses of screen-printed single crystalline silicon solar cells, we investigated an emitter etch-back technique to obtain high emitter sheet resistances, where the defective dead layer on the emitter surface was etched and became thinner as the etch-back time increased, resulting in the monotonous increase of short circuit current and open circuit voltage. We found that an optimal etch-back time should be determined to achieve the maximal performance enhancement because of fill factor decrease due to a series resistance increment mainly affected by contact and lateral resistance in this case. To elucidate the reason for the fill factor decrease, we studied the resistance analysis by potential mapping to determine the contact and the lateral series resistance. As a result, we found that the fill factor decrease was attributed to the relatively fast increase of contact resistance due to the dead layer thinning down with the lowest contact resistivity when the emitter was contacted with screen-printed silver electrode.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.02a
• /
• pp.399-399
• /
• 2011

본 논문에서는 Indium tin oxide (ITO) 투명전극의 성장온도($T_G$)가 Cu(In,Ga)$Se_2$ (CIGS) 박막태양전지에 미치는 영향을 살펴 보았다. ITO 박막은 radio-frequency magnetron sputtering을 이용하여 상온에서 $350^{\circ}C$까지의 다양한 $T_G$ 조건에서 i-ZnO/ glass와 i-ZnO/CdS/CIGS/Mo/glass 기판에 증착되었다. ITO의 비저항과 CdS/CIGS 계면 특성은 $T_G$에 크게 영향을 받았다. $T_G{\leq}200^{\circ}C$에서는 $T_G$가 증가할수록 ITO 저항이 감소하였고 이에 따른 series 저항 감소가 태양전지 성능 향상에 기여하였다. 하지만 $T_G$ > $200^{\circ}C$에서는 CdS 버퍼층의 Cd이 CIGS 층으로 확산되어 소자의 p-n 계면이 파괴되는 것을 발견하였다. $T_G=200^{\circ}C$에서 ITO를 증착한 CIGS 태양전지의 경우 가장 높은 광전변환효율을 보였다.

• Journal of the Society of Naval Architects of Korea
• /
• v.37 no.3
• /
• pp.21-26
• /
• 2000

For coastal service ships, the water depth is a very important parameter in the design stage of the hull form that has an influence on the restriction of the speed and draft of ships. In this study, the water depth is important for ship design. In this research, the change of total resistance, trim and sinkage due to the variation of water depth are measured by using on equipment for shallow water condition. For the basic research step about the shallow water effect, the effects on Series60($C_B=0.6$) hull form are experimented. To compare with existing experiment results, the test conditions are same with those. The water depth conditions are 10, 15, 20, 25% of LPP of the model ship, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2000.10a
• /
• pp.190-195
• /
• 2000

This paper presents the fabrication of the LNA which is operating at 2.13∼2.16 GHz for IMT-2000 lot-end receiver using series feedback and resistive decoupling circuit. Series feedback added to the source lead of a transistor keep the low noise characteristics and drop the input reflection coefficient of amplifier simultaneously. Also, it increases the stability of the LNA. Resistive decoupling circuit is suitable for input stage matching because a signal at low frequency is dissipated by a resistor in the matching network The amplifier consist of GaAs FET ATF-10136 for low noise stage and VNA-25 which is internally matched MMIC for high gain stage. The amplifier is fabricated with both the RF circuits and self bias circuit on the Teflon substrate with 3.5 permittivity. The measured results of the LNA which is fabricated using above design technique are presented more than 30 dB in gain P$\_$ldB/ 17 dB and less than 0.7 dB in noise figure, 1.5 in input$.$output SWR(Standing Wave Ratio).