• Journal of the Semiconductor & Display Technology
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• v.23 no.2
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• pp.135-142
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• 2024

Cu-Cu bonding, one of the key technologies in advanced packaging, enhances semiconductor chip performance, miniaturization, and energy efficiency by facilitating rapid data transfer and low power consumption. However, the quality of the interface bonding can significantly impact overall bond quality, necessitating strategies to quickly detect and classify in-process defects. This study presents a methodology for detecting defects in wafer junction areas from Scanning Acoustic Microscopy images using a ResNet-50 based deep learning model. Additionally, the use of the defect map is proposed to rapidly inspect and categorize defects occurring during the Cu-Cu bonding process, thereby improving yield and productivity in semiconductor manufacturing.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.15-18
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• 2002

To achieve the global planarization, CMP Technology has been used to the next generation semiconductor process, and the study made tremendous progress up to date. As the device demension shrinked， CMP Technology has been applied in a various way and more people interested in this field to simplify the process. To attain the goal for safer 0.13um or below 10 nano process, many of those expected task must be solved. By describing this current CMP process issue and future trend for the CMP planarization process, It personally hope that this paper would help to the people who has concerns for the next generation semiconductor manufacturing industry in common.

• Journal of the Semiconductor & Display Technology
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• v.16 no.4
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• pp.68-74
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• 2017

Nanoimprint lithography (NIL) is a next generation technology for fabrication of micrometer and nanometer scale patterns. There have been considerable attentions on NIL due to its potential abilities that enable cost-effective and high-throughput nanofabrication to the display device and semiconductor industry. Up to now there have been a lot of researches on thermal NIL, but most of them have been focused on polymer deformation in the molding process and there are very few studies on the cooling and demolding process. In this paper a cooling process of the polymer resist in thermal NIL is analyzed with finite element method. The modeling of cooling process for mold, polymer resist and substrate is developed. And the cooling process is numerically investigated with the effects of imprinting temperature and residual layer thickness of polymer resist on stress distribution of the polymer resist. The results show that the lower imprinting temperature, the higher the maximum von Mises stress and that the thicker the residual layer, the greater maximum von Mises stress.

• Journal of the Semiconductor & Display Technology
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• v.20 no.2
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• pp.126-130
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• 2021

The ball grid array is one of the packaging methods that used in high density printed circuit board. Solder void defects caused by voids in the solder ball during the BGA process do not directly affect the reliability of the product, but it may accelerate the aging of the device on the PCB layer or interface surface depending on its size or location. Void inspection is important because it is related in yields with products. The most important process in the optical inspection of solder void is the segmentation process of solder and void. However, there are several segmentation algorithms for the vision inspection, it is impossible to inspect all of images ideally. When X-Ray images with poor contrast and high level of noise become difficult to perform image processing for vision inspection in terms of software programming. This paper suggests the solution to deal with the suggested problem by means of using Mask R-CNN instead of digital image processing algorithm. Mask R-CNN model can be trained with images pre-processed to increase contrast or alleviate noises. With this process, it provides more efficient system about complex object segmentation than conventional system.

• Journal of the Korean Institute of Gas
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• v.20 no.4
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• pp.15-24
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• 2016

In the semiconductor industry, the risk of chemical accidents due to miscibility between the many types of chemicals and leakage of toxic chemicals has increased. In order to evaluate the reactivity with miscibility of chemicals, experimental method is the most reliable, but there is a time and cost limitations to be evaluated through experiment all the chemicals. In the study, the reactivity of process gases in the semiconductor industry was considered by the CRW (Chemical Reactivity Worksheets) 3.0 program developed by US NOAA (National Oceanic and Atmospheric Administration) and EPA. The reactivity informations with the miscibility of process gases for semiconductor industry provided, and also a KOSHA guide for the storage/separation of gas cylinders in dispensing cabinets in the semiconductor industry was proposed.

• Journal of the Korea Society for Simulation
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• v.15 no.2
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• pp.51-57
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• 2006

Production environment of semiconductor industry is shifting from 200mm wafer process to 300mm wafer process. In the new era of semiconductor industry, FAB (fabrication) Line Automation is a key issue that semiconductor industry is facing in shifting from 200mm wafer fabrication to 300mm wafer fabrication. In addition, since the semiconductor manufacturing technologies are being widely spread and market competitions are being stiffened, cost-down techniques became basis of growth. Most companies are trying to reduce average cycle time to increase productivity and delivery time. In this paper, we simulated 300mm wafer fabrication semiconductor manufacturing process by laying great emphasis on reduce average cycle time.

• Journal of the Korea Society of Computer and Information
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• v.18 no.3
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• pp.107-118
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• 2013

In this paper, we developed the semiconductor monitoring system for the etching process. Around the world, expert companies are competing fiercely since the semiconductor industry is a leading value-added industry that produces the essential components of electronic products. As a result, many researches have been conducted in order to improve the quality, productivity, and characteristics of semiconductor products. Process monitoring techniques has an important role to give an equivalent quality and productivity to produce semiconductor. In fact, since the etching process to form a semiconductor circuit causes great damage to the semiconductors, it is very necessary to develop a system for monitoring the process. The proposed monitoring system is mainly focused on the dry etching process using plasma and it provides the detailed observation, analysis and feedback to managers. It has the functionality of setting scenarios to match the process control automatically. In addition, it maximizes the efficiency of process automation. The result can be immediately reflected to the system since it performs real-time monitoring. UI (User Interface) provides managers with diagnosis of the current state in the process. The monitoring system has diverse functionalities to control the process according to the scenario written in advance, to stop the process efficiently and finally to increase production efficiency.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.98.4-98
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• 1998

• Journal of the Semiconductor & Display Technology
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• v.5 no.2 s.15
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• pp.41-46
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• 2006

Wet etching process in recent semiconductor manufacturing is devided into batch and single wafer type. Batch type wet etching process provides more throughput with poor etching uniformity compared to single wafer type process. Single wafer process achieves better etching uniformity by boom-swing injected chemical on rotating wafer. In this study, etching characteristics of $SiO_2$ layer at room and elevated temperature is evaluated and compared. The difference in etching rate and uniformity of each condition is identified, and the temperature profile of injected chemical is theoretically calculated and compared to that of experimental result. Better etching uniformity is observed with single wafer tool with boom-swing injection compared to single wafer process without boom-swing or batch type tool.

• Journal of the Semiconductor & Display Technology
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• v.20 no.2
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• pp.6-13
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• 2021

Cases and studies on the selection method of CTQ are relatively active, but there are few cases or studies on the selection method of CTP which is important in the device industry. In fact, many companies simply select and manage CTP from the point of contact based on their experience and intuition. The purpose of this study is to present an evaluation model and a mathematical decision model for rational and systematic CTP selection to improve the process quality of semiconductor equipment lines. In the evaluation model, AHP (Analytic Hierarchy Process) analysis technique was applied to show objective and quantitative figures, and Fuzzy decision-making model was used to solve the ambiguity and uncertainty in the decision-making process. Decision Value (DV) was presented. The subjects were 22 process factors managed in the Plating Process that the representative equipment line can do. As a result, the evaluation model proposed in this study can support more efficient and effective decision-making for process quality improvement by more objectively measuring the problem of subjective CTP selection in manufacturing sites.