• Title/Summary/Keyword: semiconductor manufacturing process

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A Study on the Machining Characteristics of CVD-SiC (CVD-SiC 소재의 가공 특성에 관한 연구)

  • Park, Hwi-Keun;Lee, Won-Seok;Kang, Dong-Won;Park, In-Seung;Lee, Jong-Chan
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.16 no.5
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    • pp.40-46
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    • 2017
  • A plasma gas control apparatus for semiconductor plasma etching processes securely holds a cathode for forming a plasma, confines the plasma during the plasma etching process, and discharges gas after etching. It is a key part of the etching process. With the advancement of semiconductor technology, there is increasing interest in parts for semiconductor manufacturing that directly affect wafers. Accordingly, in order to replace the plasma gas control device with a CVD-SiC material superior in mechanical properties to existing SiCs (Sintered-SiC, RB-SiC), a study on the grinding characteristics of CVD-SiC was carried out. It is confirmed that the optimal grinding condition was obtained when the result table feed rate was 2 m/min and the infeed depth was $5{\mu}m$.

Online Experts Screening the Worst Slicing Machine to Control Wafer Yield via the Analytic Hierarchy Process

  • Lin, Chin-Tsai;Chang, Che-Wei;Wu, Cheng-Ru;Chen, Huang-Chu
    • International Journal of Quality Innovation
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    • v.7 no.2
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    • pp.141-156
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    • 2006
  • This study describes a novel algorithm for optimizing the quality yield of silicon wafer slicing. 12 inch wafer slicing is the most difficult in terms of semiconductor manufacturing yield. As silicon wafer slicing directly impacts production costs, semiconductor manufacturers are especially concerned with increasing and maintaining the yield, as well as identifying why yields decline. The criteria for establishing the proposed algorithm are derived from a literature review and interviews with a group of experts in semiconductor manufacturing. The modified Delphi method is then adopted to analyze those results. The proposed algorithm also incorporates the analytic hierarchy process (AHP) to determine the weights of evaluation. Additionally, the proposed algorithm can select the evaluation outcomes to identify the worst machine of precision. Finally, results of the exponential weighted moving average (EWMA) control chart demonstrate the feasibility of the proposed AHP-based algorithm in effectively selecting the evaluation outcomes and evaluating the precision of the worst performing machines. So, through collect data (the quality and quantity) to judge the result by AHP, it is the key to help the engineer can find out the manufacturing process yield quickly effectively.

Status Change Monitoring of Semiconductor Plasma Process Equipment (주파수 도메인 반사파 측정법을 이용한 플라즈마 공정장비 상태변화 연구)

  • Yunsang Lee;Sang Jeen Hong
    • Journal of the Semiconductor & Display Technology
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    • v.23 no.1
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    • pp.52-55
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    • 2024
  • In this paper, a state change study was conducted through Frequency Domain Reflectometry (FDR) technology for the process chamber of plasma equipment for semiconductor manufacturing. In the experiment, by direct connecting the network analyzer to the RF matcher input of the 300 mm plasma enhanced chemical vapor deposition (PECVD) chamber, S11 was measured in a situation where plasma was not applied, and the frequency domain reacting to the chamber state change was searched. Response factors to changes in the status, such as temperature, spacing of the heating chuck, internal pressure difference, and process gas supply state were confirmed. Through this, the frequency domain in which a change in the reflection value was detected through repeated experiments. The reliability of the measured micro-displacement was verified through reproducibility experiments.

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Throughput Analysis of the Twin Chamber Platform Equipment according to the Load-lock Configuration (쌍 체임버 기반 장비의 로드락 구성에 따른 생산성 분석)

  • Hong, Joo-Pyo;Lee, Ki-Seok
    • Journal of the Semiconductor & Display Technology
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    • v.7 no.2
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    • pp.39-43
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    • 2008
  • Productivity is one of the performance indices of the semiconductor equipment in manufacturing viewpoint. Among many ways tried and adopted for improvement of the productivity of the FAB equipment, variation of equipment configuration was considered and its effect on the throughput was analyzed. Parallel machine cycle charts that were generated based on the equipment log were used in the analysis. Efficiency of the equipment due to change of the structure and the probability of the usage in the manufacturing process were examined. The results showed that the modification of the control algorithm in the equipment and the redistribution of the process time for each process and transfer module along to the change in the structure enhance the throughput of the equipment.

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Process Conditions Optimizing the Yield of Power Semiconductors (전력반도체의 수율향상을 위한 최적 공정조건 결정에 관한 연구)

  • Koh, Kwan Ju;Kim, Na Yeon;Kim, Yong Soo
    • Journal of Korean Society for Quality Management
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    • v.47 no.4
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    • pp.725-737
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    • 2019
  • Purpose: We used a data analysis method to improve semiconductor manufacturing yield. We defined and optimized important factors and applied our findings to a real-world process. The semiconductor industry is very cost-competitive; our findings are useful. Methods: We collected data on 15 independent variables and one dependent variable (yield); we removed outliers and missing values. Using SPSS Modeler ver. 18.0, we analyzed the data both continuously and discretely and identified common factors. Results: We optimized two independent variables in terms of process conditions; yield improved. We used DS Leak software to model netting and Contact CD software to model meshes. DS Leak shows smaller the better characterisrics and Contact CD shows normal the best characteristics Conclusion: Various efforts have been made to improve semiconductor manufacturing yields, and many studies have created models or analyzed various characteristics. We not only defined important factors but also showed how to control processing to improve semiconductor yield.

Research for Adaptive DeadBand Control in Semiconductor Manufacturing (Adaptive DeadBand를 애용한 반도체공정 제어)

  • Kim Jun-Seok;Ko Hyo-Heon;Kim Sung-Shick
    • Journal of the Korea Safety Management & Science
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    • v.7 no.5
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    • pp.255-273
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    • 2005
  • Overlay parameter control of the semiconductor photolithography process is researched in this paper. Overlay parameters denote the error in superposing the current pattern to the pattern previously created. The reduction of the overlay deviation is one of the key factors in improving the quality of the semiconductor products. The semiconductor process is affected by numerous environment and equipment factors. Through process condition prediction and control, the overlay inaccuracy can be reduced. Generally, three types of process condition change exist; uncontrollable white noise, slowly changing drift, and abrupt condition shift. To effectively control the aforementioned process changes, control scheme using adaptive deadband is proposed. The suggested approach and existing control method are cross evaluated through simulation.

Development of Electrode Guide of Super-drill EDM and Electrical Discharge Machining of Small Hole for High Precision Semiconductor Die (초정밀 반도체 금형 제작을 위한 슈퍼드릴 방전가공기 전극가이드 개발과 미세홀 방전가공)

  • Park, Chan-Hae;Kim, Jong-Up;Wang, Duck-Hyun;Kim, Won-Il
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.4 no.3
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    • pp.32-38
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    • 2005
  • Electrical discharge machining is the method of using thermal energy by electrical discharge. Generally, if the material of workpiece has conductivity even though very hard materials and complicated shape which are difficult to cut such as quenching steel, cemented carbide, diamond and conductive ceramics, the EDM process is favorable one of possible machining processes. But, the process is necessarily required of finish cut and heat treatment because of slow cutting speed, no mirror surface, brittleness and crack due to the residual stress for manufactured goods. In this experimental thesis, the super EDM drilling was developed for high precision semiconductor die steel and for minimization of leadframe width. It was possible to development of EDM drilling machine for high precision semiconductor die with the electrode guide and its modelling and stress analysis. The development of electrode with the copper pipe type was conducted to drill the hole from the diameter of 0.1mm to 3.0mm with the error of from 0.02mm to 0.12mm. From the SEM and EDX analysis, the entrance of the EDM drill was found the resolidification of not only the component of tungsten but also the component of copper.

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Under Sampling for Imbalanced Data using Minor Class based SVM (MCSVM) in Semiconductor Process (MCSVM을 이용한 반도체 공정데이터의 과소 추출 기법)

  • Pak, Sae-Rom;Kim, Jun Seok;Park, Cheong-Sool;Park, Seung Hwan;Baek, Jun-Geol
    • Journal of Korean Institute of Industrial Engineers
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    • v.40 no.4
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    • pp.404-414
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    • 2014
  • Yield prediction is important to manage semiconductor quality. Many researches with machine learning algorithms such as SVM (support vector machine) are conducted to predict yield precisely. However, yield prediction using SVM is hard because extremely imbalanced and big data are generated by final test procedure in semiconductor manufacturing process. Using SVM algorithm with imbalanced data sometimes cause unnecessary support vectors from major class because of unselected support vectors from minor class. So, decision boundary at target class can be overwhelmed by effect of observations in major class. For this reason, we propose a under-sampling method with minor class based SVM (MCSVM) which overcomes the limitations of ordinary SVM algorithm. MCSVM constructs the model that fixes some of data from minor class as support vectors, and they can be good samples representing the nature of target class. Several experimental studies with using the data sets from UCI and real manufacturing process represent that our proposed method performs better than existing sampling methods.

Image Processing and Deep Learning-based Defect Detection Theory for Sapphire Epi-Wafer in Green LED Manufacturing

  • Suk Ju Ko;Ji Woo Kim;Ji Su Woo;Sang Jeen Hong;Garam Kim
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.2
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    • pp.81-86
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    • 2023
  • Recently, there has been an increased demand for light-emitting diode (LED) due to the growing emphasis on environmental protection. However, the use of GaN-based sapphire in LED manufacturing leads to the generation of defects, such as dislocations caused by lattice mismatch, which ultimately reduces the luminous efficiency of LEDs. Moreover, most inspections for LED semiconductors focus on evaluating the luminous efficiency after packaging. To address these challenges, this paper aims to detect defects at the wafer stage, which could potentially improve the manufacturing process and reduce costs. To achieve this, image processing and deep learning-based defect detection techniques for Sapphire Epi-Wafer used in Green LED manufacturing were developed and compared. Through performance evaluation of each algorithm, it was found that the deep learning approach outperformed the image processing approach in terms of detection accuracy and efficiency.

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