• 전자공학회논문지D
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• 제35D권10호
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• pp.76-82
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• 1998

반도체 칩 내의 최소 선폭이 작아짐에 따라 광리소그래피에서 필연적으로 발생하는 상(image)의 왜곡 현상이 점점 심각해지고 있다. 이에 따라 광리소그래피의 해상 한계에서 발생하는 패턴의 왜곡 현상에 대한 보정(Optical Proximity Correction)은 이제 불가피한 기술이 되고 있다. 본 논문에서는 몬테-칼로 기법을 사용하여 왜곡 현상을 고려한 최적의 마스크의 패턴을 찾는 프로그램을 개발하였다. 이 프로그램을 기본적인 실제 메모리 셀 패턴에 적용시켜 수행해 본 결과 원래의 마스크 패턴보다 목표 상에 근접한 마스크 패턴을 효과적으로 구현할 수 있었을 뿐 아니라 공정 여유도의 향상도 기대할 수 있게 되었다.

• 마이크로전자및패키징학회지
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• 제14권1호
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• pp.19-26
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• 2007

본 연구의 목적은 CMOS 이미지 센서용 Au 플립칩 범프와 전해 도금된 Au 기판 사이의 초음파 접합의 가능성 연구이다. 초음파 접합 조건을 최적화하기 위해서, 대기압 플라즈마 세정 후 접합 압력과 시간을 달리하여 초음파 접합 후 전단 시험을 실시하였다. 범프의 접합 강도는 접합 압력과 시간 변수에 크게 좌우되었다. Au 플립칩 범프는 상온에서 성공적으로 하부 Au 도금 기판과 접합되었으며, 최적 조건 하에서 접합 강도는 약 73 MPa이었다.

• 센서학회지
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• 제27권6호
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• pp.357-361
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• 2018

This paper presents an averaging current adjustment technique for reducing the pixel resistance variation in a bolometer-type uncooled infrared image sensor. Each unit pixel was composed of an active pixel, a reference pixel for the averaging current adjustment technique, and a calibration circuit. The reference pixel was integrated with a polysilicon resistor using a standard complementary metal-oxide-semiconductor (CMOS) process, and the active pixel was applied from outside of the chip. The averaging current adjustment technique was designed by using the reference pixel. The entire circuit was implemented on a chip that was composed of a reference pixel array for the averaging current adjustment technique, a calibration circuit, and readout circuits. The proposed reference pixel array for the averaging current adjustment technique, calibration circuit, and readout circuit were designed and fabricated by a $0.35-{\mu}m$ standard CMOS process.

• Applied Microscopy
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• 제2권1호
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• pp.39-46
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• 1972

There are many kinds of microscopes suitable for general studies; optical microscopes(OM), conventional transmission electron microscopes (TEM), and scanning electron microscopes(SEM). The optical microscopes and the conventional transmission electron microscopes are very familiar. The images of these microscopes are directly formed on an image plane with one or more image forming lenses. On the other hand, the image of the scanning electron microscope is formed on a fluorescent screen of a cathode ray tube using a scanning system similar to television technique. In this paper, the features and some applications of the scanning electron microscope will be discussed briefly. The recently available scanning electron microscope, combining a resolution of about $200{\AA}$ with great depth of field, is favorable when compared to the replica technique. It avoids the problem of specimen damage and the introduction of artifacts. In addition, it permits the examination of many samples that can not be replicated, and provides a broader range of information. The scanning electron microscope has found application in diverse fields of study including biology, chemistry, materials science, semiconductor technology, and many others. In scanning electron microscopy, the secondary electron method. the backscattererd electron method, and the electromotive force method are most widely used, and the transmitted electron method will become more useful. Change-over of magnification can be easily done by controlling the scanning width of the electron probe. It is possible. to continuously vary the magnification over the range from 100 times to 1.00,000 times without readjustment of focusing. Conclusion: With the development of a scanning. electron microscope, it is now possible to observe almost all-information produced through interactions between substances and electrons in the form of image. When the probe is properly focused on the specimen, changing magnification of specimen orientation does not require any change in focus. This is quite different from the conventional transmission electron microscope. It is worthwhile to note that the typical probe currents of $10^{-10}$ to $10^{-12}\;{\AA}$ are for below the $10^{-5}$ to $10^{-7}\;{\AA}$ of a conventional. transmission microscope. This reduces specimen contamination and specimen damage due to heatings. Outstanding features of the scanning electron microscope include the 'stereoscopic observation of a bulky or fiber specimen in high resolution' and 'observation of potential distribution and electromotive force in semiconductor devices'.

• 한국광학회지
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• 제33권6호
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• pp.295-302
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• 2022

FHD급 고해상도 연성 내시경을 설계하기 위한 wedge prism 적용 방법을 연구하였다. 기존의 연성 내시경 광학계의 경우, 넓은 피사계 심도 범위에서 동일한 결상 성능을 얻기 위해 F 넘버를 크게 가져가거나 액체 렌즈를 적용하였다. 하지만 이는 추가적인 light guide와 기구물을 필요로 하여 광학계의 직경이 커진다는 문제점이 있다. 이를 해결하기 위해, 연성 내시경 광학계에 2매의 wedge prism을 적용하여 각 물체거리별로 상거리를 조절하였다. 먼저 설계한 내시경 광학계에 2매의 wedge prism을 대칭으로 배치하고, 각 물체거리별로 목표 결상 성능을 만족하는 상거리 값을 도출하였다. 그 다음, 상거리를 조절하기 위한 wedge prism 디센터 값을 도출하였다. 이 두 가지 데이터를 조합하여, 각 물체거리에서 목표 결상 성능을 만족하는 wedge prism 디센터 값을 다중구성으로 적용하였다. Wedge prism을 적용한 최적 설계 결과, 100 mm-7 mm의 전체 피사계 심도 범위에서, 분해능 178 cycles/mm에 대한 변조전달함수 20% 이상의 목표 결상 성능을 만족하였다.

• 전기전자학회논문지
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• 제28권1호
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• pp.90-96
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• 2024

본 논문에서는 라즈베리파이 카메라와 함수 발생기를 활용하여 이미지에서 휘도를 분석하고 이를 바탕으로 전압을 인가하여 스마트 윈도우에 착색을 통해 광 투과를 조절할 수 있는 자동화 시스템을 제안한다. 기존 휘도 측정에 사용되는 휘도계는 가격대가 높고 사용자의 불필요한 움직임을 요구해 실생활에서 활용하기 어렵다. 그러나 사진 촬영 후 Python Open Source Computer Vision Library (OpenCV)를 활용한 이미지에서의 휘도 분석은 저렴하고 휴대가 간편하여 실생활에서 쉽게 응용할 수 있다. 이 시스템을 스마트 윈도우가 적용된 환경에 사용하여 창호의 휘도를 검출하였다. 이미지의 휘도를 바탕으로 스마트 윈도우의 착색 조절을 통해 창호의 휘도를 감소시켜 재실자는 쾌적한 시 환경을 구축할 수 있다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.88-89
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• 2009

In this paper, we investigated about wet cleaning effect as deep trench formation methods for Power chip devices. Deep trench structure was classified by two methods, PSU (Poly Stick Up) and Non-PSU structure. In this paper, we could remove residue defect during wet. cleaning after deep trench etch process for non-PSU structure device as to change wet cleaning process condition. V-SEM result showed void image at the trench bottom site due to residue defect and residue component was oxide by EDS analysis. In order to find the reason of happening residue defect, we experimented about various process conditions. So, defect source was that oxide film was re-deposited at trench bottom by changed to hydrophobic property at substrate during hard mask removal process. Therefore, in order to removal residue defect, we added in-situ SCI during hard mask removal process, and defect was removed perfectly. And WLR (Wafer Level Reliability) test result was no difference between normal and optimized process condition.

• 한국생산제조학회지
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• 제23권3호
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• pp.230-236
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• 2014

Wafer level package technology is added to the surface of wafer circuit packages to create a semiconductor technology that can minimize the size of the package. However, in conventional packaging, warpage and fracture are major concerns for semiconductor manufacturing. We optimized the wafer dam design using a finite element method according to the dam height and heat distribution thermal properties. The dam design influences the uniform deposition of the image sensor and prevents the filling material from overflowing. In this study, finite element analysis was employed to determine the key factors that may affect the reliability performance of the dam package. Three-dimensional finite element models were constructed using the simulation software ANSYS to perform the dam thermo-mechanical simulation and analysis.

• 반도체디스플레이기술학회지
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• 제4권1호
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• pp.61-64
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• 2005

This study presents a new algorithm to detect the facial feature in a color image entered from the mobile device with complex backgrounds and undefined distance between camera's location and the face. Since skin color model with Hough transformation spent approximately 90$\%$ of running time to extract the fitting ellipse for detection of the facial feature, we have changed the approach to the simple geometric vector operation, called a TS(Triangle-Square) transformation. As the experimental results, this gives benefit of reduced run time. We have similar ratio of face detection to other methods with fast speed enough to be used on real-time identification system in mobile environments.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국내학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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• pp.353-359
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• 1988

In this paper, the design and implementation of a multi-processor based die bonder machine for the semiconductor will be described. This is a final research results carried out for two years from June, 1986 to July, 1988. The mechanical system consists of three subsystems such as bonding head module, wafer feeding module, and lead frame feeding module. The overall control system consists of the following three subsystems each of which employs a 16 bit microprocessor MC 68000 : (i) supervisory control system, (ii) visual recognition / inspection system and (iii) the display system. Specifically, the supervisory control system supervises the whole sequence of die bonder machine, performs a self-diagnostics while it controls the bonding head module according to the prespecified bonding cycle. The vision system recognizes the die to inspect the die quality and deviation / orientation of a die with respect to a reference position, while it controls the wafer feeding module. Finally, the display system performs a character display, image display ans various error messages to communicate with operator. Lead frame feeding module is controlled by this subsystem. It is reported that the proposed control system were applied to an engineering sample and tested in real-time, and the results are sucessful as an engineering sample phase.