• Title/Summary/Keyword: reference compensation technique.

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A Study on Systems Analysis Applied to Library Management (도서관경영(圖書館經營)에 있어서의 시스팀 분석기법응용(分析技法應用)에 관한 연구(硏究))

  • Gweon, Gyi-Won
    • Journal of the Korean BIBLIA Society for library and Information Science
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    • v.2 no.1
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    • pp.178-210
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    • 1974
  • It needs to put into practice the systems analysis in the analysis of some operations and status of library for the purpose of systematizing the work of reforming in the new easier form to process, to storage, to retrieve and to make use of the increasing informations and data of library. In this study, some of systems which are generally using in every library was caught in the case study of K university library. Having analyzed them with the two methods of the flowcharting and mathematical analysis, we found the obstructive factors in operation. As the result of this research, it was gained the new system as the alternative one. A. Alternative System B. Advantages of alternative systems 1. In the reference room When it converts the present system into the new system, it can profit 6.771 won/user (13.815won-7.044won=6.771 won). Therefore, a half the average required cost of the present system can be saved. If this saving would be alloted for the cost 33,000won required to make the cataloging cards, it would be taken for 94 days (33,000 won ${\div}$ 6,771 won/user=4,874users. 4,874users ${\div}$ 52users/day=94days) to get it. The saving cost/year by the new system will be 95,417 won, and in the first year the initial cost (33,000won) reduces the saving cost to 62,417won. 2. In the periodical room The average required time for using the materials of the present system is 17 minutes/user and the average required cost/user is 23.775won, while the average required time of the new system is 4 minutes and the average required cost/user is 5.33won. Therefore, the new system has profit 4 times of the present system. Accordingly, it occurs when the dispersed periodical materials get together. 3. In the classification and cataloging When one processes - the oriental books - by the Linear Programming Technique, the maximum of the process can be increased from 11.6 volumes per librarian of the present system to 12 volumes per librarian of the new system increased 0.4 volume in a day, and cataloging by the manual printer can be shorten from 3 minutes per card of the present system to 1.5 minutes per card of the new system. Consequently, we can complete the other operations (books equipment, updating of cataloging cards, etc.) with 141 minutes which are saved in the course of the afore-mentioned works. 4. In the status of collections The average growth rate of 4 years from 1968 to 1971 is 9.825 %, and that of the purchased materials is 6.2% similar to the advanced nations, but it has the different position from 215,000 volumes by the Standard Degree for Establishment of College and University, and the difference between the total collections 151,671 volumes and Dunns' growth model ($N_t=N_oe^{-at}$) claimed by Leimkuhler 155,297 volumes in 1971 is 3,626 volumes, and for the purpose of compensation the difference, we found the fact that it needs to have the increased budget of 24~30% per year, Thus, if the budget of 24~30 % per year. Thus, if the budget would be increased per year as the rate of the afore-mentioned figure, it would be reached at the Standard Degree for Establishment of College and University in 1975, and thereafter, it can be decreased to the lebel which is able to maintain the growth rate of 5~6% per year.

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A 1.1V 12b 100MS/s 0.43㎟ ADC based on a low-voltage gain-boosting amplifier in a 45nm CMOS technology (45nm CMOS 공정기술에 최적화된 저전압용 이득-부스팅 증폭기 기반의 1.1V 12b 100MS/s 0.43㎟ ADC)

  • An, Tai-Ji;Park, Jun-Sang;Roh, Ji-Hyun;Lee, Mun-Kyo;Nah, Sun-Phil;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.122-130
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    • 2013
  • This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.