• 한국전자파학회논문지
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• 제21권4호
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• pp.381-391
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• 2010

본 논문에서는 상용 초고주파 MEMS 스위치를 이용하여 세 개의 주파수 대역에서 재구성 동작이 가능한 주파수 재구성 능동 배열 안테나 시스템(Reconfigurable Active Array Antenna System: RAA System)을 제안하였다. MEMS 스위치는 삽입 손실 및 선형성 특성이 우수하고 격리도가 높아 주파수 재구성 시스템 구현 시, 재구성을 위한 스위치로 인한 성능 열화가 거의 없다는 장점이 있다. 제안된 주파수 재구성 능동 배열 안테나 시스템은 간단한 구조의 임피던스 매칭 회로(Reconfigurable impedance Matching Circuit: RMC)를 갖는 주파수 재구성 증폭기(Reconfigurable Front-end Amplifier: RFA)가 집적화 되어 있으며, 안테나 방사체(Reconfigurable Antenna Element: RAE)와 재구성 제어 보드(Reconfiguration Control Board: RCB)로 구성되어 있다. 본 논문에서 제안한 RAA 시스템은 850 MHz, 1.9 GHz, 3.4 GHz의 세 개 주파수로 재구성되어 동작하며, 안테나 방사체는 $2{\times}2$ 배열을 가지고 각각의 방사체는 광대역 다이폴 형태를 갖는다. 제작된 RAA 시스템은 실험을 통하여 그 타당성을 확인하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.1276-1279
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• 2002

In order to satisfy the requirement for various applications in an electronic device, many dynamically reconfigurable systems such as FPGAs have been used recently. This paper presents a pipelined scheduling for dynamically reconfigurable systems based on FPGAs. For reconfigurable systems conventional schedulings have reduced processing time by minimizing the number of reconfigurations. However, they are not effective enough for applications including many iterative processes such as digital signal processing. Our approach has been able to increase throughput of iterative applications on dynamically reconfigurable systems by using pipelined scheduling.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.418-429
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• 2018

This paper studies the decentralized position/force control problem for constrained reconfigurable manipulator without torque sensing. A novel joint torque estimation scheme that exploits the existing structural elasticity of the manipulator joint with harmonic drive model is applied for each joint module. Based on the estimated joint torque and dynamic output feedback technique, a decentralized position/force control strategy is presented. In order to solve the problem of controller parameter perturbation, the non-fragile robust technique is introduced into the dynamic output feedback controller. Subsequently, the stability of the closed-loop system is proved using the Lyapunov theory and linear matrix inequality (LMI) technique. Finally, two 2-DOF constrained reconfigurable manipulators with different configurations are applied to verify the effectiveness of the proposed control scheme in numerical simulation.

• 한국정보전자통신기술학회논문지
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• 제2권3호
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• pp.39-52
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• 2009

Scale Invariant Feature Transform (SIFT) is an effective algorithm in object recognition, panorama stitching, and image matching, however, due to its complexity, real time processing is difficult to achieve with software approaches. This paper proposes using a reconfigurable hardware processor with integer half kernel. The integer half kernel Gaussian reduces the Gaussian pyramid complexity in about half [] and the reconfigurable processor carries out a parallel implementation of a full search Fast SIFT algorithm. We use a low memory, fine grain single instruction stream multiple data stream (SIMD) pixel processor that is currently being developed. This implementation fully exposes the available parallelism of the SIFT algorithm process and exploits the processing and I/O capabilities of the processor which results in a system that can perform real time image and video compression. We apply this novel implementation to images and measure the effectiveness. Experimental simulation results indicate that the proposed implementation is capable of real time applications.

• Journal of Electrical Engineering and Technology
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• 제10권6호
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• pp.2393-2405
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• 2015

This paper considers a decentralized multiple faults detection and isolation (FDI) scheme for reconfigurable manipulators. Inspired by their modularization property, a global sliding mode (GSM) based stable adaptive fuzzy decentralized controller is investigated for the system in fault free, while for the system suffering from multiple faults (actuator fault and sensor fault), the decentralized sliding mode observer (DSMO) is employed to detect their occurrence. Hereafter, the time and location of faults can be determined by a fault isolation scheme via a bank of DSMOs. Finally, the effectiveness of the proposed schemes in controlling, detecting and isolating faults is illustrated by the simulations of two 3-DOF reconfigurable manipulators with different configurations successfully.

• 디지털산업정보학회논문지
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• 제15권2호
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• pp.63-70
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• 2019

To increase the efficiency of task on the desk, this paper proposes a reconfigurable desk. The proposed reconfigurable desk is based on the Pin Art technology. For the design of the proposed desk, the upper surface of the desk is divided into small units, and then the user easily controls the height of the divided pieces to make desk a desired shape by using the proposed user interface. The Arduino module controls the hardware and the user interface is configured by using Android applications, making it easy for anyone to use. Through extensive experiments, the proposed system shows that various types of deformations are possible and thus the utilization is very high by mounting diverse devices.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.1355-1360
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• 2005

In this paper, we approach the problem of image filter design automation using a kind of intrinsic evolvable hardware architecture. For the purpose of implementing the intrinsic evolution process in a common FPGA chip and evolving a complicated digital circuit system-image filter, the design automation system employs the reconfigurable circuit architecture as the reconfigurable component of the EHW. The reconfigurable circuit architecture is inspired by the Cartesian Genetic Programming and the functional level evolution. To increase the speed of the hardware evolution, the whole evolvable hardware system which consists of evolution algorithm unit, fitness value calculation unit and reconfigurable unit are implemented by a commercial FPGA chip. The Celoxica RC1000 card which is fitted with a Xilinx Virtex xcv2000E FPGA chip is employed as the experiment platform. As the result, we conclude the terms of the synthesis report of the image filter design automation system and hardware evolution speed in the Celoxica RC1000 card. The evolved image filter is also compared with the conventional image filter form the point of filtered image quality.

• 소성∙가공
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• 제23권2호
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• pp.103-109
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• 2014

Flexibly-reconfigurable roll forming (FRRF), which is a sheet forming process for multi-curved sheet metal, may solve both the economic and technical problems incurred in using a conventional die forming process. In the FRRF process, the multi-curved sheet metal is formed by different strain distributions on the sheet metal, and the reconfigurable rollers are used as tools during the forming. Therefore, a thorough investigation focused on the reconfigurable rollers is required for the realization of the FRRF process prior to the fabrication of FRRF machine. In the current study, a series of finite element simulations were conducted to study the load distributions experienced by the reconfigurable roller. In order to verify the shape design variables, the effect of the metal thickness on the curvatures of sheet is also presented.

• 한국산학기술학회논문지
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• 제16권1호
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• pp.666-670
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• 2015

본 논문은 생체신호를 측정하는 팔목부착용 Fitbit Flex상에 구현된 방사패턴 재구성 안테나에 관련된 논문이다. 또한 본 논문에서 제안하는 루프-다이폴 방사패턴 재구성 안테나의 인체 내 부위별 전자파 흡수율 (Specific Absorption Rate; SAR)에 관한 논문이다. 본 논문의 루프-다이폴 방사패턴 재구성 안테나는 두 개의 RF 스위치를 사용하여 서로 반대방향의 두 가지 방사패턴을 구현한다. 방사패턴 재구성 안테나는 블루투스 (Bluetooth) 통신 대역 (2.4 - 2.485 GHz)을 사용하며, 최대이득은 1.96 dBi이다. SAR 시뮬레이션 결과로 블루투스 입력 평균전력 0.04 W가 팔목을 포함하는 인체 내 다섯 개 부위 (두부, 가슴, 배, 등, 팔목)에 입력되었을 때 Federal Communication Commission (FCC)의 기준인 단위 1 g 당 1.6 W/kg을 모두 만족함을 확인하였다. 또한 최대 SAR 값은 두부에서 1.12 W/kg이다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제3권4호
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• pp.199-204
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• 2003

This paper proposes reconfigurable hardware structures for spreading and scrambling of multi-mode CDMA systems. The proposed reconfigurable structures supporting IS-95, cdma2000 and WCDMA, include a pseudo noise code generator, a channelization code generator and a control circuit for signal flow control. The proposed reconfigurable structures provide an efficient hardware usage for multi-mode CDMA systems. The synthesis results show the area reduction about 24.7% compared with the original code generators. The proposed structures can provide efficient reconfigurability and high speed operations for future SDR systems.